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ORI GIN AL PA PER Automated synthesis of resilient and tamper-evident analog circuits without a single point of failure
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@MISC{_origin,
author = {},
title = {ORI GIN AL PA PER Automated synthesis of resilient and tamper-evident analog circuits without a single point of failure},
year = {}
}
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Abstract
Abstract This study focuses on the use of genetic programming to automate the design of robust analog circuits. We define two complementary types of failure modes: partial short-circuit and partial disconnect, and demonstrated novel circuits that are resilient across a spectrum of fault levels. In particular, we focus on designs that are uniformly robust, and unlike designs based on redundancy, do not have any single point of failure. We also explore the complementary problem of designing tamper-proof circuits that are highly sensitive to any change or variation in their operating conditions. We find that the number of components remains similar both for robust and standard circuits, suggesting that the robustness does not necessarily come at significant increased circuit complexity. A number of fitness criteria,
Keyphrases
single point tamper-evident analog circuit genetic programming failure mode circuit complexity complementary problem partial disconnect partial short-circuit complementary type fault level robust analog circuit tamper-proof circuit operating condition fitness criterion standard circuit novel circuit
