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Logic BIST for large industrial designs: Real issues and case studies (1999)
| Citations: | 57 - 2 self |
BibTeX
@INPROCEEDINGS{Hetherington99logicbist,
author = {Graham Hetherington and Tony Fryars and Nagesh Tamarapalli and Mark Kassab and Abu Hassan and Janusz Rajski},
title = {Logic BIST for large industrial designs: Real issues and case studies},
booktitle = {},
year = {1999},
pages = {358--367}
}
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Abstract
This paper discusses practical issues involved in applying logic built-in self-test (BIST) to four large industrial designs. These multi-clock designs, ranging in size from 200K to 800K gates, pose significant challenges to logic BIST methodology, flow, and tools. The paper presents the process of generating a BIST-compliant core along with the logic BIST controller for at-speed testing. Comparative data on fault grades and area overhead between automatic test pattern generation (ATPG) and logic BIST are reported. The experimental results demonstrate that with automation of the proposed solutions, logic BIST can achieve test quality approaching that of ATPG with minimal area overhead and few changes to the design flow. I.
Keyphrases
logic bist large industrial design case study real issue logic bist controller practical issue multi-clock design fault grade pose significant challenge automatic test pattern generation bist methodology minimal area overhead test quality logic built-in self-test bist-compliant core experimental result design flow comparative data at-speed testing
