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Compiler-guided register reliability improvement against soft errors (2005)
| Venue: | In International Conference on Embedded Software |
| Citations: | 20 - 0 self |
BibTeX
@INPROCEEDINGS{Yan05compiler-guidedregister,
author = {Jun Yan and Wei Zhang},
title = {Compiler-guided register reliability improvement against soft errors},
booktitle = {In International Conference on Embedded Software},
year = {2005},
pages = {203--209}
}
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Abstract
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely used in reliability-sensitive environments, it becomes increasingly important to develop cost-effective techniques to improve the processor reliability against soft errors. This paper focuses on studying the register file immunity against soft errors since modern processors typically employ a large number of registers, which are accessed very frequently. As a result, soft errors occurred in registers can easily propagate to functional units or the memory system, leading to silent data error (SDC) or system crash. To develop cost-effective techniques to fight soft errors for embedded processors, the first step is to understand the register file susceptibility to soft errors and its impact on the system reliability accurately. Toward this goal, this paper proposes the concept of register vulnerability factor (RVF) to characterize the probability that register transient errors can escape the register file and thus potentially impact the system reliability. Built upon the RVF concept, we then propose two cost-effective compiler-guided techniques to improve the register file reliability by lowering the RVF value. Our experiments indicate that on average, the RVF can be reduced to 9.1 % and 9.5 % by the hyperblock-based instruction re-scheduling and the reliability-oriented register assignment respectively, which can potentially lower the reliability cost significantly while protecting register files against transient errors.
Keyphrases
soft error compiler-guided register reliability improvement transient error system reliability embedded processor cost-effective technique register file reliability-sensitive environment reliability-oriented register assignment register vulnerability factor cost-effective compiler-guided technique processor reliability register file susceptibility functional unit first step hyperblock-based instruction re-scheduling reliability cost rvf value memory system critical challenge data error rvf concept large number register file immunity external particle strike system crash modern processor microprocessor design register file reliability register transient error
