Efficient Reconfigurable Logic Circuits for Matching Complex Network Intrusion Detection Patterns

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Efficient Reconfigurable Logic Circuits for Matching Complex Network Intrusion Detection Patterns (2003)

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by Christopher R. Clark , David E. Schimmel

Venue:	In Proceedings of 13th International Conference on Field Program
Citations:	65 - 3 self

BibTeX

@INPROCEEDINGS{Clark03efficientreconfigurable,
    author = {Christopher R. Clark and David E. Schimmel},
    title = {Efficient Reconfigurable Logic Circuits for Matching Complex Network Intrusion Detection Patterns},
    booktitle = {In Proceedings of 13th International Conference on Field Program},
    year = {2003},
    pages = {956--959}
}

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Abstract

Abstract. This paper presents techniques for designing pattern matching circuits for complex regular expressions, such as those found in network intrusion detection patterns. We have developed a pattern-matching coprocessor that supports all the pattern matching functions of the Snort rule language [3]. In order to achieve maximum pattern capacity and throughput, the design focuses on minimizing circuit area while maintaining high clock speed. Using our approach, we are able to store the entire current Snort rule database consisting of over 1,500 rules and 17,000 characters into a single onemillion-gate FPGA while comparing all patterns against traffic at gigabit rates. 1

Keyphrases

efficient reconfigurable logic circuit pattern-matching coprocessor high clock speed maximum pattern capacity network intrusion detection pattern circuit area single onemillion-gate fpga complex regular expression gigabit rate snort rule language

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