DMCA

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL.??, NO.?, MONTH YYYY 1 First-Order Incremental Block-Based Statistical Timing Analysis

by U Visweswariah , Senior Member , Kaushik Ravindran , Student Member , Kerim Kalafala , G. Walker , Sambasivan Narayan , Daniel K. Beece , Jeff Piaget , Natesan Venkateswaran , Jeffrey G. Hemmett