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Abstract Deterministic Logic BIST for Transition Fault Testing 1
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@MISC{Gherman_abstractdeterministic,
author = {Valentin Gherman and Hans-joachim Wunderlich},
title = {Abstract Deterministic Logic BIST for Transition Fault Testing 1},
year = {}
}
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Abstract
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applied to stuck-at fault testing. As delay faults have lower random pattern testability than stuck-at faults, the need for DLBIST schemes is increased. Nevertheless, an extension to delay fault testing is not trivial, since this necessitates the application of pattern pairs. Consequently, delay fault testing is expected to require a larger mapping effort and logic overhead than stuck-at fault testing. In this paper, we consider the so-called transition fault model, which is widely used for complexity reasons. We present an extension of a DLBIST scheme for transition fault testing. Functional justification has been used to generate the required pattern pairs. The efficiency of the extended scheme is investigated using difficult to test industrial designs.
Keyphrases
stuck-at fault abstract deterministic logic bist transition fault testing dlbist scheme delay fault required pattern pair functional justification at-speed test extended scheme industrial design deterministic logic bist attractive approach complexity reason inherent support pattern pair logic overhead transition fault delay fault testing random pattern testability so-called transition fault model mapping effort
