DMCA
Design Error Diagnosis in Logic Circuits using Ternary Test Sets (1993)
| Venue: | Proc. 26th Design Automation Conference |
| Citations: | 4 - 3 self |
BibTeX
@INPROCEEDINGS{Wahba93designerror,
author = {Ayman Wahba and David Déharbe},
title = {Design Error Diagnosis in Logic Circuits using Ternary Test Sets},
booktitle = {Proc. 26th Design Automation Conference},
year = {1993},
pages = {212--217}
}
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Abstract
Debugging of logic circuits necessitates not only the error detection, but also the reasoning about its cause and location. In this report diagnostic routines are presented for this purpose. The error classes considered are the wrong gate-type, and the extra/missing inverter errors. These routines are based on simulating the circuit behaviour under the application of ternary test patterns. Based on the simulation results, an error hypothesis is made and the corresponding diagnostic routine is applied. Three different methods for test pattern generation are presented. These methods depend on the circuit representation either by AND/OR graphs or by binary decision diagrams (BDD's). For this work to be integrated with the existing CAD tools, we have implemented a translator from a VHDL subset to the input form of the test generation and diagnosis routines.
Keyphrases
logic circuit ternary test set design error diagnosis error hypothesis error detection binary decision diagram simulation result different method test generation circuit representation test pattern generation corresponding diagnostic routine vhdl subset ternary test pattern circuit behaviour wrong gate-type input form inverter error diagnosis routine cad tool report diagnostic routine
