DMCA
A.: Generic side-channel countermeasures for reconfigurable devices (2011)
| Venue: | In: Cryptographic Hardware and Embedded Systems (CHES |
| Citations: | 10 - 3 self |
BibTeX
@INPROCEEDINGS{Güneysu11a.:generic,
author = {Tim Güneysu and Amir Moradi},
title = {A.: Generic side-channel countermeasures for reconfigurable devices},
booktitle = {In: Cryptographic Hardware and Embedded Systems (CHES},
year = {2011},
pages = {33--48}
}
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Abstract
Abstract. In this work, we propose and evaluate generic hardware countermeasures against DPA attacks for recent FPGA devices. The proposed set of FPGA-specific countermeasures can be combined to resist a large variety of first-order DPA attacks, even with 100 million recorded power traces. This set includes generic and resource-efficient countermeasures for on-chip noise generation, random-data processing delays and S-box scrambling using dual-ported block memories. In particular, it is possible to build many of these countermeasures into a single IP-core or hard macro that then provides basic protection for any cryptographic implementation just by its inclusion in the design process – what is particularly useful for engineers with no or little background on IT security and SCA attacks. 1
Keyphrases
reconfigurable device generic side-channel countermeasure large variety cryptographic implementation little background single ip-core dpa attack recent fpga device recorded power trace random-data processing delay first-order dpa attack sca attack fpga-specific countermeasure resource-efficient countermeasure basic protection design process generic hardware countermeasure hard macro on-chip noise generation dual-ported block memory
