DMCA
Prototyping Efficient Interprocessor Communication Mechanisms
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BibTeX
@MISC{Papaefstathiou_prototypingefficient,
author = {Vassilis Papaefstathiou and Dionisios Pnevmatikatos and Manolis Marazakis and Giorgos Kalokairinos and Aggelos Ioannou and Michael Papamichael and Stamatis Kavadias and Giorgos Mihelogiannakis and Manolis Katevenis},
title = {Prototyping Efficient Interprocessor Communication Mechanisms},
year = {}
}
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Abstract
Abstract-Parallel computing systems are becoming widespread and grow in sophistication. Besides simulation, rapid system prototyping becomes important in designing and evaluating their architecture. We present an efficient FPGAbased platform that we developed and use for research and experimentation on high speed interprocessor communication, network interfaces and interconnects. Our platform supports advanced communication capabilities such as Remote DMA, Remote Queues, zero-copy data delivery and flexible notification mechanisms, as well as link bundling for increased performance. We report on the platform architecture, its design cost, complexity and performance (latency and throughput). We also report our experiences from implementing benchmarking kernels and a user-level benchmark application, and show how software can take advantage of the provided features, but also expose the weaknesses of the system. I.
Keyphrases
efficient interprocessor communication mechanism network interface remote queue remote dma flexible notification mechanism advanced communication capability platform architecture rapid system high speed interprocessor communication provided feature user-level benchmark application design cost zero-copy data delivery
