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Tuning Strategies for Global Interconnects in High-Performance Deep-Submicron ICs (1999)
| Venue: | VLSI Design |
BibTeX
@ARTICLE{Sudhakar99tuningstrategies,
author = {Andrew Kahng Sudhakar and Andrew B. Kahng and Sudhakar Muddu and Egino Sarto},
title = {Tuning Strategies for Global Interconnects in High-Performance Deep-Submicron ICs},
journal = {VLSI Design},
year = {1999},
volume = {10},
pages = {21--34}
}
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Abstract
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of line thicknesses, widths and spacings in multi-layer interconnect to simultaneously optimize signal distribution, signal performance, signal integrity, and interconnect manufacturability and reliability. This is a key activity in most leading-edge design projects, but has received little attention in the literature. Our work provides the first technology-specific studies of interconnect tuning in the literature. We center on global wiring layers and interconnect tuning issues related to bus routing, repeater insertion, and choice of shielding /spacing rules for signal integrity and performance. We address four basic questions. (1) How should width and spacing be allocated to maximize performance for a given line pitch? (2) For a given line pitch, what criteria affect the optimal interval at which repeaters shoul...
Keyphrases
high-performance deep-submicron ic interconnect tuning global interconnects signal integrity line pitch basic question repeater insertion interconnect manufacturability key activity global wiring layer first technology-specific study physical design multi-layer interconnect high-performance vlsi system leading-edge design project line thickness signal distribution optimal interval signal performance critical degree little attention
