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A low area overhead packet-switched network on chip: architecture and prototyping
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by
O Moraes
,
Ney Calazans
,
Aline Mello
,
Ro M. Oller
,
Luciano Ost
| Venue: | in: IFIP Very Large Scale Integration (VLSI-SOC |
| Citations: | 113 - 13 self |
BibTeX
@INPROCEEDINGS{Moraes_alow,
author = {O Moraes and Ney Calazans and Aline Mello and Ro M. Oller and Luciano Ost},
title = {A low area overhead packet-switched network on chip: architecture and prototyping},
booktitle = {in: IFIP Very Large Scale Integration (VLSI-SOC},
year = {},
pages = {318--323}
}
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Abstract
packet-switching networks on chip
