RaPiD - Reconfigurable Pipelined Datapath

DMCA

RaPiD - Reconfigurable Pipelined Datapath (1996)

Cached

Download Links

Other Repositories/Bibliography

DBLP

by Carl Ebeling , Darren C. Cronquist , Paul Franklin

Citations:

105 - 8 self

BibTeX

@MISC{Ebeling96rapid-,
    author = {Carl Ebeling and Darren C. Cronquist and Paul Franklin},
    title = {RaPiD - Reconfigurable Pipelined Datapath},
    year = {1996}
}

OpenURL

Abstract

Configurable computing has captured the imagination of many architects who want the performance of application-specific hardware combined with the reprogrammability of general-purpose computers. Unfortunately, configurable computing has had rather limited success largely because the FPGAs on which they are built are more suited to implementing random logic than computing tasks. This paper presents RaPiD, a new coarse-grained FPGA architecture that is optimized for highly repetitive, computation-intensive tasks. Very deep application-specific computation pipelines can be configured in RaPiD. These pipelines make much more efficient use of silicon than traditional FPGAs and also yield much higher performance for a wide range of applications.

Keyphrases

rapid reconfigurable configurable computing application-specific hardware deep application-specific computation pipeline limited success computation-intensive task many architect wide range new coarse-grained fpga architecture random logic general-purpose computer efficient use traditional fpgas

DMCA