Efficient Verification of Timed Automata using Dense and Discrete Time Semantics

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Efficient Verification of Timed Automata using Dense and Discrete Time Semantics

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by Marius Bozga , Oded Maler , Stavros Tripakis

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27 - 5 self

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@MISC{Bozga_efficientverification,
    author = {Marius Bozga and Oded Maler and Stavros Tripakis},
    title = {Efficient Verification of Timed Automata using Dense and Discrete Time Semantics},
    year = {}
}

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Abstract

In this paper we argue that the semantic issues of discrete vs. dense time should be separated as much as possible from the pragmatics of state-space representation. Contrary to some misconceptions, the discrete semantics is not inherently bound to use state-explosive techniques any more than the dense one. In fact, discrete timed automata can be analyzed using any representation scheme (such as DBM) used for dense time, and in addition can benefit from enumerative andsymbolic techniques (such as BDDs) which are not naturally applicable to dense time. DBMs, on the other hand, can still be used more efficiently by taking into account the activity of clocks, to eliminate redundancy. To support these claims we report experimental results obtained using an extension of Kronos with BDDs and variable-dimension DBMs where we veri ed the asynchronous chip STARI, a FIFO bu er which provides for skew-tolerant communication between two synchronous systems. Using discrete time and BDDs we were able to prove correctness of a STARI implementation with 18 stages (55 clocks), better than what has been achieved using other techniques. The verification results carry over to the dense semantics. Using variable-dimension DBMs we havemanaged to verify STARI for up to 8 stages (27 clocks). In fact, our analysis shows that at most one third of the clocks are active at any reachable state, and about one fourth of the clocks are active in 90 % of the reachable states.

Keyphrases

discrete time semantics timed automaton efficient verification dense time variable-dimension dbms dense semantics state-space representation representation scheme synchronous system discrete v discrete time semantic issue veri cation result active atanyreachable state account theactivity state-explosive technique asynchronous chip stari fifo bu er discrete semantics stari implementation skew-tolerant communication enumerative andsymbolic technique experimental result reachable state

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