Networks on Chip

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Networks on Chip (2003)

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by Axel Jantsch

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123 - 12 self

BibTeX

@MISC{Jantsch03networkson,
    author = {Axel Jantsch},
    title = {Networks on Chip},
    year = {2003}
}

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Abstract

Future single chip systems will resemble more traditional computer networks than traditional central processors. The main reasons for this trend are (A) the infeasibility of global synchrony on a single chip, (B) the necessity of reuse of existing hardware and software components as much as possible, and (C) the heterogeneity of system functions and features. The consequences of this trend are far reaching and imply the shift in concern from computation and sequential algorithms to concurrency, communication and interaction in every aspect of design and development of hardware and software. A concrete example of this shift is the expected replacement of purely sequential computer languages by languages that contain concurrency as a first order object. 1

Keyphrases

first order object sequential computer language global synchrony main reason software component future single chip system expected replacement single chip sequential algorithm concrete example traditional computer network traditional central processor system function