An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration

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An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration (2004)

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by Andrei Radulescu , John Dielissen , Kees Goossens , Edwin Rijpkema , Paul Wielage

Venue:	IEEE Transactions on CAD of Integrated Circuits and Systems
Citations:	58 - 15 self

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@ARTICLE{Radulescu04anefficient,
    author = {Andrei Radulescu and John Dielissen and Kees Goossens and Edwin Rijpkema and Paul Wielage},
    title = {An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration},
    journal = {IEEE Transactions on CAD of Integrated Circuits and Systems},
    year = {2004},
    volume = {24},
    pages = {4--17}
}

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Abstract

In this paper we present a network interface for an on-chip network. Our network interface decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transactionbased protocol to achieve backward compatibility with existing bus protocols such as AXI, OCP and DTL. Our network interface has a modular architecture, which allows flexible instantiation. It provides both guaranteed and best-effort services via connections. These are configured via network interface ports using the network itself, instead of a separate control interconnect. An example instance of this network interface with 4 ports has an area of 0.143mm in a 0.13m technology, and runs at 500 MHz.

Keyphrases

shared-memory abstraction network interface flexible network configuration example instance transactionbased protocol network interface decouples computation network implementation backward compatibility best-effort service bus protocol modular architecture network interface port on-chip network flexible instantiation separate control interconnect