BibTeX
@MISC{Ur_coveragedriven,
author = {Shmuel Ur and Yoav Yadin},
title = {Coverage Driven Processor Test Generation: Proof of Concept},
year = {}
}
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Abstract
This paper shows the first implementation of the methodology developed in [18] to a superscalar state of the art PowerPC implementation[17][16]. The experiment, which is described in detail, includes modeling of parts of that processor in SMV[10], generating abstract tests from the model using CFSM [7], converting the abstract tests into restric- tions on architectural tests, converting the restrictions into directive for a test generation tool, generating the tests using Genesys [4], executing the tests on the real implementation and verifying, clock by clock, that the real tests executed match the abstract tests. Similar methodologies that use formal verification to drive test generation has been sugested in the past [15][13]. As the goal of this paper is to describe an experiment, the difference between the methodologies (can be seen in [18]) is not elaborated. The results from the experiment were very encouraging both from the theoretical and practical consideration. We showed that using the methodology suggested it is possible to generate architctural tests with known micro architectural properties for a real, very large, design. We showed that using a very small model we can generate tests on the real pipelines that have exactly the same timing. This is a very important achievement because it lets us generate directly, and not by trial and error, the cases in which the window of opportunity for an event is very narrow. We compar our results to the current methodology and show its benefits. The rest of this paper is organized as follows: In section 2 we give an overview of the methodology used. I n section 3 we describe the processor to which we apply this methodology. In section 4 we describe the experiment with its many stages. Section 5 details some of the probl...
Keyphrases
abstract test coverage driven processor test generation real implementation superscalar state practical consideration micro architectural property architectural test similar methodology formal verification important achievement test generation real test first implementation small model current methodology restric tions art powerpc implementation real pipeline test generation tool architctural test many stage
