DMCA

Breaking the power-delay tradeoff: design of low-power high-speed MOS current-mode logic circuits operating with reduced supply voltage (2007)

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Other Repositories/Bibliography

  • DBLP
  • by Stéphane Badel , Yusuf Leblebici
    Venue:in Proc. of IEEE Int. Symp. on Circ. and Syst. (ISCAS
    Citations:7 - 2 self