An Edge-Endpoint-Based Configurable Hardware

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An Edge-Endpoint-Based Configurable Hardware (1999)

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by Architecture For Vlsi , Zhen Luo , Margaret Martonosi , Pranav Ashar

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Proc. of the IEEE Symposium on Field-Programmable Custom Computing Machines

BibTeX

@INPROCEEDINGS{Vlsi99anedge-endpoint-based,
    author = {Architecture For Vlsi and Zhen Luo and Margaret Martonosi and Pranav Ashar},
    title = {An Edge-Endpoint-Based Configurable Hardware},
    booktitle = {Proc. of the IEEE Symposium on Field-Programmable Custom Computing Machines},
    year = {1999},
    pages = {158--167}
}

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Abstract

Design rule checking (DRC) is an important step in VLSI design in which the widths and spacings of design features in a VLSI circuit layout are checked against the design rules of a particular fabrication process. In the past, some efforts to build hardware accelerators for DRC have been proposed, but these efforts were hobbled by the fact that it is often impractical to build a different rule-checking ASIC each time design rules or fabrication processes change.

Keyphrases

edge-endpoint-based configurable hardware design feature different rule-checking asic design rule fabrication process vlsi design particular fabrication process hardware accelerator important step time design rule design rule checking vlsi circuit layout

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