Sequential circuit test generation using dynamic state traversal

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Sequential circuit test generation using dynamic state traversal (1997)

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by Michael S. Hsiao , Elizabeth M. Rudnick , Janak H. Patel

Venue:	Proc. European Conf. Design Automation
Citations:	62 - 13 self

BibTeX

@INPROCEEDINGS{Hsiao97sequentialcircuit,
    author = {Michael S. Hsiao and Elizabeth M. Rudnick and Janak H. Patel},
    title = {Sequential circuit test generation using dynamic state traversal},
    booktitle = {Proc. European Conf. Design Automation},
    year = {1997},
    pages = {22--28}
}

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Abstract

A new method for state justi cation is proposed for sequential circuit test generation. The linear list of states dynamically obtained during the derivation of test vectors is used to guide the search during state justi cation. State-transfer sequences may already be known that drive the circuit from the current state to the target state. Otherwise, genetic engineering of existing state-transfer sequences is required. In both cases, genetic-algorithm-based techniques are used to generate valid state justi cation sequences for the circuit in the presence of the target fault. This approach achieves extremely high fault coverages and thus outperforms previous deterministic and simulation-based techniques. I

Keyphrases

sequential circuit test generation dynamic state traversal state justi cation state-transfer sequence genetic-algorithm-based technique test vector target fault new method genetic engineering high fault coverage current state valid state justi cation sequence target state linear list simulation-based technique

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