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An optimal warning-zone-length assignment algorithm for realtime and multiple-QoS on-chip bus arbitration
| Venue: | ACM Transactions on Embedded Computing Systems (TECS |
| Citations: | 1 - 0 self |
BibTeX
@ARTICLE{Peng_anoptimal,
author = {Huan-kai Peng and Youn-long Lin},
title = {An optimal warning-zone-length assignment algorithm for realtime and multiple-QoS on-chip bus arbitration},
journal = {ACM Transactions on Embedded Computing Systems (TECS},
year = {}
}
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Abstract
In an advanced System-on-Chip (SoC) for real-time applications, the arbiter of its on-chip com-munication sub-system needs to support multiple QoS criteria while providing a hard real-time guarantee. To fulfill both objectives, the arbitration algorithm must dynamically switch between non-real-time (NRT) and real-time (RT) modes such that use of the RT mode is minimized to best accommodate the overall QoS criteria. In this paper, we define a model for this problem, and propose optimal solutions to its associated problems with static and dynamic warning-zone-length assignment. Compared with previous works, the proposed approach enables a bus arbiter to use much less RT-mode in providing real-time (RT) guarantee and, therefore, gives the arbiter more opportunity to employ non-RT-modes to achieve better overall QoS. Experimental results show that the proposed approach reduces RT mode usage by as much as 37.1%. Moreover, that reduction in RT mode usage helps cut execution time by 27.0 % when applying our approach to an industrial DRAM controller. Another case study on an AMBA-compliant ultra-high-resolution H.264 decoder IP shows that the proposed approach reduces RT mode usage by 26.4%, which leads to an average reduction of 10.4 % in decoding time. Finally, when implementing a 16 master arbiter, it costs only 6.9K and 9.5K gates of overhead using the proposed static and dynamic ap-proach, respectively. Therefore, the proposed approach is suitable for real-time SoC applications.
Keyphrases
optimal warning-zone-length assignment algorithm rt mode usage multiple-qos on-chip bus arbitration on-chip com-munication sub-system need optimal solution advanced system-on-chip rt mode dynamic ap-proach multiple qos criterion industrial dram controller master arbiter case study previous work arbitration algorithm hard real-time guarantee real-time application amba-compliant ultra-high-resolution execution time overall qos average reduction dynamic warning-zone-length assignment bus arbiter overall qos criterion real-time soc application decoder ip experimental result
