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A SystemLevel Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs
| Venue: | In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (2010 |
| Citations: | 2 - 0 self |
BibTeX
@INPROCEEDINGS{Gladigau_asystemlevel,
author = {Jens Gladigau and Andreas Gerstlauer and Christian Haubelt and Martin Streubühr and Jürgen Teich},
title = {A SystemLevel Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs},
booktitle = {In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (2010},
year = {}
}
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Abstract
Abstract—System-level synthesis is the task of automatically implementing application models as hardware/software systems. It encompasses four basic sub tasks, namely decision making and refinement for both computation and communication. In the past, several system-level synthesis approaches have been proposed. However, it was shown that each of these approaches has drawbacks in at least one of the four sub tasks. In this paper, we present our efforts towards a comprehensive system-level synthesis by combining two academic system-level solutions into a seamless approach that automatically generates pin-accurate implementation-level models starting from a formal application model and generic MPSoC architecture templates. We analyze the system-level synthesis flow and define intermediate representations in terms of transaction level models that serve as link between existing tools. Furthermore, we present the automated transformation between models for combining two design flows. We demonstrate the combined flow on an industrial-strength example and show the benefits of fully automatic exploration and synthesis for rapid and early system-level design. I.
Keyphrases
formal application model generic bus-based mpsocs systemlevel synthesis approach generic mpsoc architecture template basic sub task decision making pin-accurate implementation-level model sub task academic system-level solution abstract system-level synthesis transaction level model system-level synthesis flow industrial-strength example automated transformation seamless approach application model automatic exploration early system-level design comprehensive system-level synthesis design flow define intermediate representation hardware software system several system-level synthesis approach
