### Citations

599 |
Analog integrated circuit design
- Johns, Martin
- 1997
(Show Context)
Citation Context ...ages and currents during a simulation time step is insignificant. Hence, the average current flowing in a branch can be accurately represented by the change in charge divided by the uniform time step =-=[7]-=-. The average current-to-voltage transfer function in (1) can thereby be converted into an equivalent discrete-time charge difference-to-voltage transfer function using P( z) �1 V � � c ( z) 2 1 2 1� ... |

59 |
Delta-sigma modulation in fractional-N frequency synthesis
- Riley, Copeland, et al.
- 1993
(Show Context)
Citation Context ...ly used in wireless communication applications as a local oscillator to generate accurately defined frequencies. The technique offers high switching speed, low phase noise, and narrow channel spacing =-=[1]-=-. The design of Fractional-N PLL synthesizers, however, requires an iterative design process due to the large set of system parameters that must be optimized to achieve the desired phase noise, settli... |

24 | Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits
- Perrott
(Show Context)
Citation Context ...nt amount of samples are required for an accurate simulation. In recent years, various behavioral level simulators for Fractional-N PLL synthesizers have been reported to address these challenges. In =-=[2]-=-, Perrott developed a custom C++ simulator for the behavioral simulation of Fractional-N PLL systems with uniform time steps based on an area conservation principle to minimize the adverse effects of ... |

10 |
Oversampled Delta-Sigma Modulators, Analysis, Applications and Novel topologies
- Kozak, Kale
- 2003
(Show Context)
Citation Context ...ction using initial condition, (a) zero initial condition, and (b) “1” LSB initial condition The second method involves imposing a small initial condition on the first accumulator of the �� modulator =-=[8]-=-. Because the IV - 783 long term average of the �� output is not dependent on the value of the initial condition, with this method the output frequency can be synthesized with greater accuracy. In Fig... |

3 |
Modeling of fractional-N division frequency synthesizer with Simulink and Matlab
- Brigati
- 2001
(Show Context)
Citation Context ...stom C++ simulator for the behavioral simulation of Fractional-N PLL systems with uniform time steps based on an area conservation principle to minimize the adverse effects of signal quantization. In =-=[3]-=-, Brigati et al. developed a simulation environment using MATLAB™ and SIMULINK™. A time-domain simulator has also been reported by Fan in [4]. Cassina et al. developed an event-driven simulator with n... |

1 |
Modeling and Simulation of �� Frequency Synthesizers
- Fan
- 2001
(Show Context)
Citation Context ...to minimize the adverse effects of signal quantization. In [3], Brigati et al. developed a simulation environment using MATLAB™ and SIMULINK™. A time-domain simulator has also been reported by Fan in =-=[4]-=-. Cassina et al. developed an event-driven simulator with non-uniform time steps using Verilog [5]. In this paper, a new simulation environment is developed for Fractional-N PLL frequency synthesizers... |

1 |
A Spur-free FractionalN �� PLL for GSM Applications: Linear Model and Simulations
- Cassia, Shah, et al.
- 2003
(Show Context)
Citation Context ...ion environment using MATLAB™ and SIMULINK™. A time-domain simulator has also been reported by Fan in [4]. Cassina et al. developed an event-driven simulator with non-uniform time steps using Verilog =-=[5]-=-. In this paper, a new simulation environment is developed for Fractional-N PLL frequency synthesizers based on a mixed MATLAB™ and CMEX™ platform. The continuous-time average current-to-voltage trans... |