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## Width Minimization in the Single-Electron Transistor Array Synthesis

### Citations

3524 | Graph-based algorithms for Boolean function manipulation
- Bryant
- 1986
(Show Context)
Citation Context ... electrons involvement in the switching process. Therefore, the conduction mechanism of the conventional CMOS-based logic is not applicable to SETs. As a result, a binary decision diagram (BDD)-based =-=[2]-=- architecture was proposed as a suitable platform for implementing logic functions using SETs [1]. Therefore, a Boolean circuit can be implemented by mapping its BDD onto a BDDbased SET array which is... |

216 |
Threshold Logic and Its Applications.
- Muroga
- 1971
(Show Context)
Citation Context ...t-threshold vector 〈w1, w2, . . . , wn;T 〉 to represent an LTG. We also transform the negative weights of an LTG into positive ones by applying a Positive-Negative weight transformation procedure [12]=-=[14]-=-[18] for ease of analysis in this work. Next, let us discuss how to derive the product terms from a threshold network. Given a single-output threshold network, we compute its disjoint product terms fr... |

115 |
Logic Synthesis and Optimization Benchmarks, Version 3.0”,
- Yang
- 1991
(Show Context)
Citation Context ...hus, in this work, we propose a synthesis algorithm for width minimization, which also reduces the length of routing wires and saves power in SET arrays. We conducted the experiments on a set of MCNC =-=[19]-=- and IWLS 2005 [21] benchmarks. The mapped results were verified by an SET verification tool [5]. The experimental results show that our approach saves 26% of the width compared to [7] while spending ... |

3 |
et al., “Carbon Nanotube Single-Electron Transistors at
- Postma
- 2001
(Show Context)
Citation Context ...ng switching operations, is ultra-low, SETs are considered as a promising candidate that substitutes conventional Complementary Metal-Oxide-Semiconductor (CMOS) devices for future VLSI/SoC designs [5]=-=[15]-=-[17][20]. Although SETs are promising candidate devices that could substitute CMOSs, they have a poor driving capability and poor threshold control due to only one or few electrons involvement in the ... |

2 | et al.,“Reconfigurable BDD-based Quantum Circuits - Eachempati - 2008 |

1 |
et al., “Single-Electron Logic Device Based on the Binary Dicision Diagram
- Asahi
- 1997
(Show Context)
Citation Context ...ntional CMOS-based logic is not applicable to SETs. As a result, a binary decision diagram (BDD)-based [2] architecture was proposed as a suitable platform for implementing logic functions using SETs =-=[1]-=-. Therefore, a Boolean circuit can be implemented by mapping its BDD onto a BDDbased SET array which is represented as a hexagonal nanowire network controlled by schottky wrap gates [9][11]. In parall... |

1 |
et al., “Automated Mapping for Reconfigurable Single-Electron Transistor Arrays
- Chen
- 2011
(Show Context)
Citation Context ...el with the advances of SET array realization, a reconfigurable version of SET that uses wrap gate tunable tunnel barriers was proposed in [8] and the first automatic synthesis method was proposed in =-=[3]-=-. Furthermore, [6][7] proposed mapping approaches to reduce the number of hexagons of the mapped SET arrays by using reordering techniques. Although [6][7] minimized the number of hexagons in SET This... |

1 | et al., “Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies - Zhang - 2004 |

1 |
et al., “Verification of Reconfigurable Binary Decision Diagram-based Single-Electron Transistor Arrays
- Chen
- 2013
(Show Context)
Citation Context ...uring switching operations, is ultra-low, SETs are considered as a promising candidate that substitutes conventional Complementary Metal-Oxide-Semiconductor (CMOS) devices for future VLSI/SoC designs =-=[5]-=-[15][17][20]. Although SETs are promising candidate devices that could substitute CMOSs, they have a poor driving capability and poor threshold control due to only one or few electrons involvement in ... |

1 |
et al., “A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays
- Chen
- 2013
(Show Context)
Citation Context ...es of SET array realization, a reconfigurable version of SET that uses wrap gate tunable tunnel barriers was proposed in [8] and the first automatic synthesis method was proposed in [3]. Furthermore, =-=[6]-=-[7] proposed mapping approaches to reduce the number of hexagons of the mapped SET arrays by using reordering techniques. Although [6][7] minimized the number of hexagons in SET This work is supported... |

1 |
Chiang et al., “On Reconfigurable Single-Electron Transistor Arrays Synthesis Using Reordering Techniques
- E
- 2013
(Show Context)
Citation Context ...of SET array realization, a reconfigurable version of SET that uses wrap gate tunable tunnel barriers was proposed in [8] and the first automatic synthesis method was proposed in [3]. Furthermore, [6]=-=[7]-=- proposed mapping approaches to reduce the number of hexagons of the mapped SET arrays by using reordering techniques. Although [6][7] minimized the number of hexagons in SET This work is supported in... |

1 |
et al., “Hexagonal Binary Decision Diagram Quantum Logic Circuits Using Schottky In-Plane and Wrap Gate
- Hasegawa
- 2001
(Show Context)
Citation Context ... primary challenges in chip design to meet the Moore’s law. To deal with this issue, many ultra-low power devices have been explored. Since the power consumption of Single-Electron Transistors (SETs) =-=[9]-=-, which work with only one or few electrons during switching operations, is ultra-low, SETs are considered as a promising candidate that substitutes conventional Complementary Metal-Oxide-Semiconducto... |

1 | et al., “GaAs Schottky Wrap-Gate Binary-Decision-Diagram Devices for Realization of Novel Single Electron Logic Architecture - Kasai - 2000 |

1 |
et al., “Fabrication of GaAs-based Integrated 2-bit Half and Full Adders by Novel Hexagonal BDD Quantum Circuit Approach
- Kasai
- 2001
(Show Context)
Citation Context ... using SETs [1]. Therefore, a Boolean circuit can be implemented by mapping its BDD onto a BDDbased SET array which is represented as a hexagonal nanowire network controlled by schottky wrap gates [9]=-=[11]-=-. In parallel with the advances of SET array realization, a reconfigurable version of SET that uses wrap gate tunable tunnel barriers was proposed in [8] and the first automatic synthesis method was p... |

1 |
et al., “On Rewiring and Simplification for Canonicity
- Kuo
- 2011
(Show Context)
Citation Context ...eight-threshold vector 〈w1, w2, . . . , wn;T 〉 to represent an LTG. We also transform the negative weights of an LTG into positive ones by applying a Positive-Negative weight transformation procedure =-=[12]-=-[14][18] for ease of analysis in this work. Next, let us discuss how to derive the product terms from a threshold network. Given a single-output threshold network, we compute its disjoint product term... |

1 | et al., “Device Circuit Co-Design Using Classical and - Liu - 2011 |

1 | Kumar Karrea et al., “Room Temperature Single Electron Transistor Fabricated by Focused Ion Beam Deposition - Santosh - 2007 |

1 |
et al., “Room Temperature Nanocrystalline Silicon Single-Electron Transistors
- Tan
- 2003
(Show Context)
Citation Context ...witching operations, is ultra-low, SETs are considered as a promising candidate that substitutes conventional Complementary Metal-Oxide-Semiconductor (CMOS) devices for future VLSI/SoC designs [5][15]=-=[17]-=-[20]. Although SETs are promising candidate devices that could substitute CMOSs, they have a poor driving capability and poor threshold control due to only one or few electrons involvement in the swit... |

1 |
Tsai et al., “Sensitization Criterion for Threshold Logic Circuits and its Application
- K
- 2013
(Show Context)
Citation Context ...reshold vector 〈w1, w2, . . . , wn;T 〉 to represent an LTG. We also transform the negative weights of an LTG into positive ones by applying a Positive-Negative weight transformation procedure [12][14]=-=[18]-=- for ease of analysis in this work. Next, let us discuss how to derive the product terms from a threshold network. Given a single-output threshold network, we compute its disjoint product terms from t... |

1 |
et al., “Silicon Single-Electron Quantum-Dot Transistor Switch Operating at Room Temperature
- Zhuang
- 1998
(Show Context)
Citation Context ...hing operations, is ultra-low, SETs are considered as a promising candidate that substitutes conventional Complementary Metal-Oxide-Semiconductor (CMOS) devices for future VLSI/SoC designs [5][15][17]=-=[20]-=-. Although SETs are promising candidate devices that could substitute CMOSs, they have a poor driving capability and poor threshold control due to only one or few electrons involvement in the switchin... |