Performance and Power Analysis of Time-multiplexed Execution on Dynamically Reconfigurable Processor

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Performance and Power Analysis of Time-multiplexed Execution on Dynamically Reconfigurable Processor

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by Yohei Hasegawa , Shohei Abe , Shunsuke Kurotaki , Vu Manh Tuan , Naohiro Katsura , Takuro Nakamura , Takashi Nishimura , Hideharu Amano

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75	Architecture evaluation for power– efficient FPGAs,‖ Proc.OftheACM/SIGDAInternational.Symposium onFieldProgrammable Gate Arrays - Li, Chen, et al. (Show Context) Citation Context ... dissipation and frequency of the context switching. In addition, since many FPGA architecture evaluations for power efficiency have been already performed and future architectures are examined[10][9]=-=[6]-=-, the comparison of power efficiency with power-aware FPGAs such as Xilinx’s Spartan devices[13] is required. Furthermore, we shall develop low-power application design techniques for dynamically reco...
67	A flexible Power Model for FPGAs - Poon, Yan, et al. - 2002 (Show Context) Citation Context ...wer dissipation and frequency of the context switching. In addition, since many FPGA architecture evaluations for power efficiency have been already performed and future architectures are examined[10]=-=[9]-=-[6], the comparison of power efficiency with power-aware FPGAs such as Xilinx’s Spartan devices[13] is required. Furthermore, we shall develop low-power application design techniques for dynamically r...
60	Dynamic power consumption in the Virtex-II FPGA family. - Shang, Kaviani, et al. - 2002 (Show Context) Citation Context ...n power dissipation and frequency of the context switching. In addition, since many FPGA architecture evaluations for power efficiency have been already performed and future architectures are examined=-=[10]-=-[9][6], the comparison of power efficiency with power-aware FPGAs such as Xilinx’s Spartan devices[13] is required. Furthermore, we shall develop low-power application design techniques for dynamicall...
41	Reconfigurable Processor Architecture, Microprocessor Forum, - Motomura, Dynamically - 2002 (Show Context) Citation Context ...econfigurable devices have attracted much attention because of their high-speed processing and flexible properties in embedded systems[11][3]. Recent dynamically reconfigurable processors, such as DRP=-=[7]-=-, DAPDNA[4], XPP[8], and D-Fabrix[1], consist of coarse-grained processing elements (PEs) and distributed memory modules. They can dynamically change the PE operation and inter-PE connection according...
28	A Flexible and Energy-Efficient Coarse-Grained Reconfigurable Architecture for Mobile Systems”, - Heysters, Smit, et al. - 2003 (Show Context) Citation Context ...quantitatively. 1. Introduction In recent years, dynamically reconfigurable devices have attracted much attention because of their high-speed processing and flexible properties in embedded systems[11]=-=[3]-=-. Recent dynamically reconfigurable processors, such as DRP[7], DAPDNA[4], XPP[8], and D-Fabrix[1], consist of coarse-grained processing elements (PEs) and distributed memory modules. They can dynamic...
13	Dynamic Reconfiguration in Mobile Systems - Smit, Havinga, et al. - 2002 (Show Context) Citation Context ...ion quantitatively. 1. Introduction In recent years, dynamically reconfigurable devices have attracted much attention because of their high-speed processing and flexible properties in embedded systems=-=[11]-=-[3]. Recent dynamically reconfigurable processors, such as DRP[7], DAPDNA[4], XPP[8], and D-Fabrix[1], consist of coarse-grained processing elements (PEs) and distributed memory modules. They can dyna...
3	An adaptive cryptographic accelerator for ipsec on dynamically reconfigurable processor - Hasegawa, Abe, et al. - 2005 (Show Context) Citation Context ... Transform in MP3 decoder IMDCT 360 [12] Fast Fourier Transform FFT 101 [5] Active Direction Pass Filter ADPF 90 [5] Viterbi Decoder Viterbi 320 - Advanced Encryption Standard on ECB mode AES-ECB 448 =-=[2]-=- Secure Hash Algorithm 1 SHA-1 61 [2] formance. Here, the context size, which corresponds to the amount of available computational resources, is a crucial factor for the time-multiplexed execution. It...
2	Implementation of Active Direction-Pass Filter on Dynamically Reconfigur able - Kurotaki, Suzuki, et al. (Show Context) Citation Context ...ions Application Name Abbr. Max PEs Ref. Discrete Cosine Transform in JPEG encoder DCT 259 [12] Inverse Modified Discrete Cosine Transform in MP3 decoder IMDCT 360 [12] Fast Fourier Transform FFT 101 =-=[5]-=- Active Direction Pass Filter ADPF 90 [5] Viterbi Decoder Viterbi 320 - Advanced Encryption Standard on ECB mode AES-ECB 448 [2] Secure Hash Algorithm 1 SHA-1 61 [2] formance. Here, the context size, ...