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## Efficient test compaction for pseudo-random testing

Venue: | in Proc. 14th Asian Test Symp |

Citations: | 3 - 0 self |

### Citations

14037 |
Computers and Intractability: A Guide to the Theory of NP-Completeness, Freeman,
- Garey, Johnson
- 1979
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Citation Context ...roceedings of the 14th Asian Test Symposium (ATS ’05)s1081-7735/05 $20.00 © 2005 IEEEsPage 2sThis test compaction problem can be shown to be NPcomplete by reduction from the minimum set coversproblem =-=[1]-=-, hence efficient polynomial-time algorithmssmust be found that provide good approximations.sThe general problem of circuit-specific customization ofspseudo-random sequence generators has beensvigorou... |

122 |
Built-in Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers
- Hellebrand, Rajski, et al.
- 1995
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Citation Context ...mations.sThe general problem of circuit-specific customization ofspseudo-random sequence generators has beensvigorously studied for the last twenty years. Proposedssolutions involve reseeding of LFSR =-=[2, 3, 4, 5, 6, 7, 8,s9, 10]-=-, weighted random-pattern generation (WRPG)s[11, 12, 13, 14, 15, 16], and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combi... |

83 | Bit-flipping BIST.
- Wunderlich, Kiefer
- 1996
(Show Context)
Citation Context ...eneration (WRPG)s[11, 12, 13, 14, 15, 16], and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combinationswith Markov sources =-=[17, 18, 19, 20]-=-.sAlong thissspectrum of approaches, our contribution falls undersWRPG because the 0, 1, and x values in a cube can besmapped to the very simple weight set, {0, 1, 0.5}.sThe primary contribution of th... |

72 | Random-pattern coverage enhancement and diagnosis for LSSD logic self-test. - Eichelberger, Lindbloom - 1983 |

60 | vector encoding using partial LFSR reseeding
- Krishna, Touba
- 2001
(Show Context)
Citation Context ...mations.sThe general problem of circuit-specific customization ofspseudo-random sequence generators has beensvigorously studied for the last twenty years. Proposedssolutions involve reseeding of LFSR =-=[2, 3, 4, 5, 6, 7, 8,s9, 10]-=-, weighted random-pattern generation (WRPG)s[11, 12, 13, 14, 15, 16], and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combi... |

55 | Reducing Test Data Volume Using LFSR Reseeding with Seed Compression
- Krishna, Touba
- 2002
(Show Context)
Citation Context ...mations.sThe general problem of circuit-specific customization ofspseudo-random sequence generators has beensvigorously studied for the last twenty years. Proposedssolutions involve reseeding of LFSR =-=[2, 3, 4, 5, 6, 7, 8,s9, 10]-=-, weighted random-pattern generation (WRPG)s[11, 12, 13, 14, 15, 16], and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combi... |

43 |
3 weight pseudo-random test genera-tion based on a deterministic test set for combinational and sequential circuits,”IEEE Trans. Comput.-Aided Des.
- Pomeranz, Reddy
- 1993
(Show Context)
Citation Context ...-random sequence generators has beensvigorously studied for the last twenty years. Proposedssolutions involve reseeding of LFSR [2, 3, 4, 5, 6, 7, 8,s9, 10], weighted random-pattern generation (WRPG)s=-=[11, 12, 13, 14, 15, 16]-=-, and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combinationswith Markov sources [17, 18, 19, 20].sAlong thissspectrum of ... |

38 | Pattern Generation for a Deterministic BIST Scheme
- Hellebrand, Reeb, et al.
- 1995
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28 | Transformed pseudo-random patterns for BIST
- Touba, McCluskey
- 1995
(Show Context)
Citation Context ...eneration (WRPG)s[11, 12, 13, 14, 15, 16], and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combinationswith Markov sources =-=[17, 18, 19, 20]-=-.sAlong thissspectrum of approaches, our contribution falls undersWRPG because the 0, 1, and x values in a cube can besmapped to the very simple weight set, {0, 1, 0.5}.sThe primary contribution of th... |

27 | Bit-Fixing in Pseudorandom Sequences for Scan BIST
- Touba, McCluskey
- 2001
(Show Context)
Citation Context ...eneration (WRPG)s[11, 12, 13, 14, 15, 16], and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combinationswith Markov sources =-=[17, 18, 19, 20]-=-.sAlong thissspectrum of approaches, our contribution falls undersWRPG because the 0, 1, and x values in a cube can besmapped to the very simple weight set, {0, 1, 0.5}.sThe primary contribution of th... |

25 |
Low hardware overhead scan based 3-weight weighted random BIST,” inProc.
- Wang
- 2001
(Show Context)
Citation Context ...-random sequence generators has beensvigorously studied for the last twenty years. Proposedssolutions involve reseeding of LFSR [2, 3, 4, 5, 6, 7, 8,s9, 10], weighted random-pattern generation (WRPG)s=-=[11, 12, 13, 14, 15, 16]-=-, and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combinationswith Markov sources [17, 18, 19, 20].sAlong thissspectrum of ... |

25 | Using BIST control for pattern generation
- Kiefer, Wunderlich
- 1997
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21 |
M.Amin, “Efficient Compression and Application of Deterministic Patterns
- Wohl, Patel
- 2003
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21 |
A Method for Generating Weighted Random Test Patterns
- Waicukauski, Lindbloom, et al.
- 1989
(Show Context)
Citation Context ...ee-weight sets in [11,s13, 11, 15, 16]. However, reference [15] also considerssmore than three weights in their algorithm and their bestsresults (shown in parentheses) come from 9-weights.sReferences =-=[21, 22]-=- allow multiple arbitrary weights.sOur algorithm consistently performs significantly bettersthan others’ for all but chkn-ML, the multi-levelssynthesized circuit, for which our test length is onlyssli... |

15 | On calculating efficient lfsr seeds for built-in self test,”
- Fagot, Gascuel, et al.
- 1999
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13 | BIST reseeding with very few seeds
- Al-Yamani, Mitra, et al.
- 2003
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13 |
Cube-Contained Random Patterns and their Application to the Complete Testing of Synthesized Multi-le
- Pateras, Rajski
- 1991
(Show Context)
Citation Context ...-random sequence generators has beensvigorously studied for the last twenty years. Proposedssolutions involve reseeding of LFSR [2, 3, 4, 5, 6, 7, 8,s9, 10], weighted random-pattern generation (WRPG)s=-=[11, 12, 13, 14, 15, 16]-=-, and embedding of deterministicspatterns in the pseudo-random sequence by using bitfixing or bit-flipping logic, sometimes in combinationswith Markov sources [17, 18, 19, 20].sAlong thissspectrum of ... |

12 | Built-in Reseeding for Serial BIST - Al-Yamani, McCluskey - 2003 |

11 |
On computing optimized input probabilities for random tests
- Wunderlich
- 1987
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11 | Deterministic Pattern Generation for Weighted Random Pattern Testing
- Reeb, Wunderlich
- 1996
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Citation Context ...r mustsmaximize “don’t cares” during test generation,sotherwise, it may not be possible to achieve good testscompaction due to the “redundant” or “contradictory”sinformation contained in the test set =-=[21]-=-.sOn the othershand, if the don’t cares are not filled in, the faultssimulation steps may not be able to drop many faultssthat would otherwise have been detected, thus leading tosan impractically larg... |

10 |
Design of an Efficient Weighted Random Pattern Generation System
- Kapur, Patil, et al.
- 1994
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5 | A scan BIST generation method using a markov source and partial bit-fixing
- Li, Yu, et al.
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Citation Context ...24 91 66.8 5 5120 55.2 5 8 0 0sTable 6: Number of Weights/Cubes and Test Length Comparison with the Best Published ResultssCircuit OurssKapurs[15] Waics[22] Pomes[13] Pate [11] Reeb [21] Wangs[16] Li =-=[23]-=- c2670 12/3072 15/4608s(5/3840)s8/5888 15/30675 - 2/9600 8/8K -sc7552 18/4608 21/6656s(7/6400)s10/9728 36/73728 - 6/17046 9/6.7K -sS13207 10/2560 - - - - 3/7026 6/71.6k 20.4kss15850 11/2816 - - - - 3/... |

4 |
Low-energy BIST design for scan-based logic circuits
- Bhattacharya, Seth, et al.
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