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## SAT-based unbounded symbolic model checking

Venue: | in Proc. 40th Design Automat. Conf. Anaheim, CA: IEEE Computer Society |

Citations: | 35 - 0 self |

### Citations

3515 | Graph-based algorithms for boolean function manipulation
- Bryant
- 1986
(Show Context)
Citation Context ...ecent hardware model-checking algorithms are symbolic, this paper focuses only on symbolic model checking. In 1986, R. E. Bryant proposed binary decision diagrams (BDDs) to represent Boolean formulas =-=[8]-=-, and in 1990, K. L. McMillan et al. proposed a BDD-based model checking algorithm [6], [7]. The algorithm can handle circuits with about 10 states, and many methods have been proposed to improve the ... |

1384 | Automatic verification of finite-state concurrent systems using temporal logic specifications
- Clarke, Emerson, et al.
- 1986
(Show Context)
Citation Context ... state explosion problem that the problem size grows very rapidly as the size of a target design increases. In the earlier model-checking algorithms, a target design is expressed explicitly [1], [2], =-=[4]-=-, [5]. As the algorithms require much memory, they can be applied to only small circuits. To cope with the memory problem, symbolic model checking was proposed as an alternative [6], [7], where the se... |

1257 |
A computing procedure for quantification theory
- Davis, Putnam
- 1960
(Show Context)
Citation Context ...odel checking (BMC) [9], [10] uses Boolean satisfiability checking (SAT) procedures instead of BDDs. The SAT problem is to determine whether a given Boolean formula has a satisfying assignment or not =-=[11]-=-–[13]. In BMC, given a bound , transitions are unfolded into an equation. The property to check is transformed into an equation such that the equation is true if and only if the property is false with... |

912 | Symbolic Model Checking without BDDs
- Biere, Cimatti, et al.
- 1999
(Show Context)
Citation Context ...ited range of circuits because of the memory explosion. Many works have been proposed to overcome the explosion, but there is no one that resolves the problem completely. Bounded model checking (BMC) =-=[9]-=-, [10] uses Boolean satisfiability checking (SAT) procedures instead of BDDs. The SAT problem is to determine whether a given Boolean formula has a satisfying assignment or not [11]–[13]. In BMC, give... |

755 | Symbolic Model Checking: 10 20 States and Beyond
- Burch, Clarke, et al.
- 1990
(Show Context)
Citation Context ...plicitly [1], [2], [4], [5]. As the algorithms require much memory, they can be applied to only small circuits. To cope with the memory problem, symbolic model checking was proposed as an alternative =-=[6]-=-, [7], where the sets of states and the state-transition relation are expressed as formulas. Since Manuscript received May 23, 2003; revised September 15, 2003, February 9, 2004, and April 14, 2004. T... |

503 | Efficient implementation of a BDD package
- Brace, Rudell, et al.
(Show Context)
Citation Context ... justification used in automatic test pattern generation (ATPG) [16] to find necessary variable assignments. In addition, the proposed satisfy-all procedure exploits a cache table, as is used in BDDs =-=[17]-=-. In traversing a search space, the procedure saves intermediate results in a cache table. When meeting a situation equivalent to a previous one, the proposed procedure accesses the corresponding resu... |

401 |
On the complexity of derivation in propositional calculus
- Tseitin
- 1968
(Show Context)
Citation Context ...tion of literals, where a literal is a variable or its complement. An arbitrary Boolean formula can be transformed into a CNF formula with a representative variable by using the procedure in [10] and =-=[23]-=-, where is satisfiable if and only if is satisfiable and is satisfiable if and only if is satisfiable. In this CNF form, an operation on CNF formulas can be implemented easily. Given a binary operatio... |

329 | Symbolic model checking using SAT procedures instead of BDDs,
- Biere, Cimatti, et al.
- 1999
(Show Context)
Citation Context ...range of circuits because of the memory explosion. Many works have been proposed to overcome the explosion, but there is no one that resolves the problem completely. Bounded model checking (BMC) [9], =-=[10]-=- uses Boolean satisfiability checking (SAT) procedures instead of BDDs. The SAT problem is to determine whether a given Boolean formula has a satisfying assignment or not [11]–[13]. In BMC, given a bo... |

195 |
Sequential circuit verification using symbolic model checking
- Burch, Clarke, et al.
- 1990
(Show Context)
Citation Context ...tly [1], [2], [4], [5]. As the algorithms require much memory, they can be applied to only small circuits. To cope with the memory problem, symbolic model checking was proposed as an alternative [6], =-=[7]-=-, where the sets of states and the state-transition relation are expressed as formulas. Since Manuscript received May 23, 2003; revised September 15, 2003, February 9, 2004, and April 14, 2004. This w... |

163 |
Chaff: Engineering an Efficient
- Moskewicz, Madigan, et al.
(Show Context)
Citation Context ...checking (BMC) [9], [10] uses Boolean satisfiability checking (SAT) procedures instead of BDDs. The SAT problem is to determine whether a given Boolean formula has a satisfying assignment or not [11]–=-=[13]-=-. In BMC, given a bound , transitions are unfolded into an equation. The property to check is transformed into an equation such that the equation is true if and only if the property is false within tr... |

163 | Applying SAT methods in unbounded symbolic model checking
- McMillan
- 2002
(Show Context)
Citation Context ...h only for transitions. Recently, a BDD-based BMC algorithm has been proposed in [14]. In opposition to BMC, the model checking that is not limited by a bound is called unbounded model checking (UMC) =-=[15]-=-. In this paper, we propose a SAT-based UMC algorithm in which the sets of states and the transition relation are expressed in conjunctive normal form (CNF). The proposed algorithm performs quantifica... |

113 | Formal Verification in Hardware Design: A Survey",
- Kern, Greenstreet
- 1999
(Show Context)
Citation Context ...s the state explosion problem that the problem size grows very rapidly as the size of a target design increases. In the earlier model-checking algorithms, a target design is expressed explicitly [1], =-=[2]-=-, [4], [5]. As the algorithms require much memory, they can be applied to only small circuits. To cope with the memory problem, symbolic model checking was proposed as an alternative [6], [7], where t... |

93 | Symbolic reachability analysis based on SAT-solvers
- Abdulla, Bjesse, et al.
- 2000
(Show Context)
Citation Context ...ecking is implicitly included in the proposed satisfy-all procedure. Formula-based algorithms that the sets of states and the transition relation are represented in formulas were proposed in [21] and =-=[22]-=-. They usually use their own representations, such as binary expression diagrams (BEDs) and reduced Boolean circuits (RBCs), and do quantification by generating two equations and and taking the disjun... |

84 | Automatic verification of sequential circuits using temporal logic
- Browne, Clarke, et al.
- 1986
(Show Context)
Citation Context ...e explosion problem that the problem size grows very rapidly as the size of a target design increases. In the earlier model-checking algorithms, a target design is expressed explicitly [1], [2], [4], =-=[5]-=-. As the algorithms require much memory, they can be applied to only small circuits. To cope with the memory problem, symbolic model checking was proposed as an alternative [6], [7], where the sets of... |

53 | Combining decision diagrams and SAT procedures for efficient symbolic model checking
- FrederickWilliams, Biere, et al.
- 2000
(Show Context)
Citation Context ...nd the checking is implicitly included in the proposed satisfy-all procedure. Formula-based algorithms that the sets of states and the transition relation are represented in formulas were proposed in =-=[21]-=- and [22]. They usually use their own representations, such as binary expression diagrams (BEDs) and reduced Boolean circuits (RBCs), and do quantification by generating two equations and and taking t... |

32 | SAT-based Image Computation with Application in Reachability Analysis,"
- Gupta, Yang, et al.
- 2000
(Show Context)
Citation Context ...een made to reduce the memory requirement by using noncanonical representation. A. Gupta and et al. proposed an algorithm that represents the sets of states in BDDs and the transition relation in CNF =-=[19]-=-, [20]. The algorithm performs quantification with a procedure similar to ours. However, when a value is assigned to a variable, the algorithm checks whether the state-set BDD becomes a zero BDD. The ... |

26 | Partition-Based Decision Heuristics for Image Computation using SAT and BDDs
- Gupta, Yang, et al.
- 2001
(Show Context)
Citation Context ...de to reduce the memory requirement by using noncanonical representation. A. Gupta and et al. proposed an algorithm that represents the sets of states in BDDs and the transition relation in CNF [19], =-=[20]-=-. The algorithm performs quantification with a procedure similar to ours. However, when a value is assigned to a variable, the algorithm checks whether the state-set BDD becomes a zero BDD. The propos... |

15 | Efficient preimage computation using a novel success-driven atpg
- Sheng, Hsiao
- 2003
(Show Context)
Citation Context ...tect equivalent situations efficiently by managing the field and considering the number of undetermined variables and clauses. Although a similar method is proposed for an ATPG-based UMC algorithm in =-=[18]-=-, it cannot be applied to general satisfy-all algorithms. The rest of this paper is organized as follows. Section II discusses the differences between the related works and the proposed algorithm. Sec... |

12 | Can BDDs compete with SAT solvers on bounded model checking
- Cabodi, Camurati, et al.
(Show Context)
Citation Context ...s is checked by the SAT procedure. Although BMC algorithms can check large circuits, they guarantee the property’s truth only for transitions. Recently, a BDD-based BMC algorithm has been proposed in =-=[14]-=-. In opposition to BMC, the model checking that is not limited by a bound is called unbounded model checking (UMC) [15]. In this paper, we propose a SAT-based UMC algorithm in which the sets of states... |

3 | Model checking of S3C2400X industrial embedded SOC product
- Choi, Yun, et al.
(Show Context)
Citation Context ...g more attention in recent years. A promising verification method called formal verification has emerged during the last decade to detect corner-case errors that are hardly detected by simulation [1]–=-=[3]-=-. Formal verification has a variety of methods, and among them, the most widely used is model checking. Given a model and a property, model checking verifies whether or not the model satisfies the pro... |

1 | Boolean satisifiability in electronic design automation - Marques-Silva, Sakallah |