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## METHODOLOGY Accurate Logic Simulation by Overcoming the Unknown Value Propagation Problem (2003)

### Citations

391 |
A neutral netlist of 10 combinational benchmark circuits and a target translator
- Brglez, Fujiwara
- 1985
(Show Context)
Citation Context ...scheduler that schedules the events at the right time by considering logic primitive delays. The simulation results are generated through postprocessing. The ISCAS 85 combinational benchmark circuits =-=[14]-=- were used to evaluate the performance of the logic simulation based on the partitioning simulation algorithm. All the Downloaded from http://sim.sagepub.com at PENNSYLVANIA STATE UNIV on April 16, 20... |

125 | SOCRATES: A Highly Efficient Automatic Test Pattern Generation System - Schulz, Trischler, et al. - 1988 |

57 | Diagnosis and Reliable Design of Digital Systems", - Breuer, Friedman - 1976 |

35 |
Digital Logic Testing and Simulation
- Miczo
- 1986
(Show Context)
Citation Context ...anged to values other than 0 or 1, such as initialization of the logic net, spikes, hazards, and so forth. However, the unknown values may cause the unknown value propagation (X- propagation) problem =-=[3, 4]-=-, which results in indeterminate outputs. Therefore, it is necessary to have a way of handling the unknown value propagation problem efficiently. An example of the X-propagation problem is shown in Fi... |

11 |
The simulation automation system SAS; concepts, implementations, and results
- Kang, Szygenda
- 1994
(Show Context)
Citation Context ...t aspects of the total process of designing and manufacturing printed circuit boards or VLSI chips are verifying and validating a set of diagnostic tests for the products. It is clear that simulation =-=[1, 2]-=-, at various levels, is essential and commonly used for verifying the design of digital systems. As circuits become larger and more complicated, the speed and accuracy of simulation are emphasized mor... |

8 | Digital system simulation: Methodologies and examples
- Olukotun, Heinrich, et al.
- 1998
(Show Context)
Citation Context ...t aspects of the total process of designing and manufacturing printed circuit boards or VLSI chips are verifying and validating a set of diagnostic tests for the products. It is clear that simulation =-=[1, 2]-=-, at various levels, is essential and commonly used for verifying the design of digital systems. As circuits become larger and more complicated, the speed and accuracy of simulation are emphasized mor... |

7 |
Accurate logic simulation in the presence of unknowns
- Chandra, Patel
- 1989
(Show Context)
Citation Context ...ights reserved. Not for commercial use or unauthorized distribution.sFigure 1. Example of the X-propagation problem nominal delay = 1 Figure 2. Example of the nominal delay model In Chandra and Patel =-=[9]-=-, a highly accurate simulation method is proposed using a Karnaugh map. Unknown values can be found and determined by finding all redundant prime implicants in the Karnaugh map of a circuit and by add... |

6 |
The complexity of accurate logic simulation
- Chang, Abraham
- 1987
(Show Context)
Citation Context ...map of a circuit and by adding those terms to the circuits. Since finding all prime implicants is time-consuming and almost impossible for large circuits, the algorithm is identified as not practical =-=[10]-=-. Therefore, applying this method to large circuits could be inappropriate. An efficient method should be reasonable in terms of time and accuracy, but there is a trade-off between the 60 SIMULATION V... |

1 |
Logic design and simulation
- Horbst
- 1986
(Show Context)
Citation Context ...anged to values other than 0 or 1, such as initialization of the logic net, spikes, hazards, and so forth. However, the unknown values may cause the unknown value propagation (X- propagation) problem =-=[3, 4]-=-, which results in indeterminate outputs. Therefore, it is necessary to have a way of handling the unknown value propagation problem efficiently. An example of the X-propagation problem is shown in Fi... |

1 |
Mapping and algorithms for gate modeling on a digital simulation environment
- Jea, Szygenda
- 1979
(Show Context)
Citation Context ... demonstrate the high performance of the new algorithm and show the relationship between the partitioning depth and the required memory size. The logic simulation methods suggested in Jea and Szygenda=-=[5]-=-, Szygenda and Thomson [6], and Abramovici, Breuer, and Friedman [8] cannot solve the X-propagation problem properly, so comparisons are not possible with our simulation techniques. On the other hand,... |

1 |
Modeling and digital sim68 SIMULATION Volume 79, Number 2 Kang and Szygenda ulation for design verification and diagnosis
- Szygenda, Thomson
- 1976
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Citation Context ...ormance of the new algorithm and show the relationship between the partitioning depth and the required memory size. The logic simulation methods suggested in Jea and Szygenda[5], Szygenda and Thomson =-=[6]-=-, and Abramovici, Breuer, and Friedman [8] cannot solve the X-propagation problem properly, so comparisons are not possible with our simulation techniques. On the other hand, the logic simulation meth... |

1 |
Digital system and testable design
- Abramovici, Breuer, et al.
- 1990
(Show Context)
Citation Context ...one of the next gates along the path to the primary outputs. As shown in Figure 5, due to undiscriminated unknown values, this method can produce incorrect outputs. We can avoid the pessimistic cases =-=[8]-=- by discriminating unknown values and by determining outputs with the following Boolean algebra. X n + X n = 1, Xn × Xn = 0. If an unknown value passes through a gate that is not a not gate, then it i... |

1 | Dynamic search space pruning techniques in path sensitization - Silva, Sakallah - 1996 |

1 | Fault location based on circuit partitioning - Pomeranz, Reddy - 1996 |