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12
Alternationfree modal mucalculus for data trees
 In LICS’07
, 2007
"... An alternationfree modal µcalculus over data trees is introduced and studied. A data tree is an unranked ordered tree whose every node is labelled by a letter from a finite alphabet and an element (“datum”) from an infinite set. For expressing datasensitive properties, the calculus is equipped wi ..."
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An alternationfree modal µcalculus over data trees is introduced and studied. A data tree is an unranked ordered tree whose every node is labelled by a letter from a finite alphabet and an element (“datum”) from an infinite set. For expressing datasensitive properties, the calculus is equipped with freeze quantification. A freeze quantifier stores in a register the datum labelling the current tree node, which can then be accessed for equality comparisons deeper in the formula. The main results in the paper are that, for the fragment with forward modal operators and one register, satisfiability over finite data trees is decidable but not primitive recursive, and that for the subfragment consisting of safety formulae, satisfiability over countable data trees is decidable but not elementary. The proofs use alternating tree automata which have registers, and establish correspondences with nondeterministic tree automata which have faulty counters. Allowing backward modal operators or two registers causes undecidability. As consequences, decidability is obtained for two datasensitive fragments of the XPath query language. The paper shows that, for reasoning about data trees, the forward fragment of the calculus with one register is a powerful alternative to a recently proposed firstorder logic with two variables. 1.
Model checking freeze LTL over onecounter automata
, 2008
"... We study complexity issues related to the modelchecking problem for LTL with registers (a.k.a. freeze LTL) over onecounter automata. We consider several classes of onecounter automata (mainly deterministic vs. nondeterministic) and several syntactic fragments (restriction on the number of regist ..."
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We study complexity issues related to the modelchecking problem for LTL with registers (a.k.a. freeze LTL) over onecounter automata. We consider several classes of onecounter automata (mainly deterministic vs. nondeterministic) and several syntactic fragments (restriction on the number of registers and on the use of propositional variables for control locations). The logic has the ability to store a counter value and to test it later against the current counter value. By introducing a nontrivial abstraction on counter values, we show that model checking LTL with registers over deterministic onecounter automata is PSPACEcomplete with infinite accepting runs. By constrast, we prove that model checking LTL with registers over nondeterministic onecounter automata is Σ 1 1complete [resp. Σ 0 1complete] in the infinitary [resp. finitary] case even if only one register is used and with no propositional variable. This makes a difference with the facts that several verification problems for onecounter automata are known to be decidable with relatively low complexity, and that finitary satisfiability for LTL with a unique register is decidable. Our results pave the way for modelchecking LTL with registers over other classes of operational models, such as reversalbounded counter machines and deterministic pushdown systems.
Bounded depth data trees
 In ICALP’07
, 2007
"... Abstract. A data tree is a tree where each node has a label from a finite set, and a data value from a possibly infinite set. We consider data trees whose depth is bounded beforehand. By developing an appropriate automaton model, we show that under this assumption various formalisms, including a two ..."
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Cited by 10 (1 self)
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Abstract. A data tree is a tree where each node has a label from a finite set, and a data value from a possibly infinite set. We consider data trees whose depth is bounded beforehand. By developing an appropriate automaton model, we show that under this assumption various formalisms, including a two variable firstorder logic and a subset of XPath, have decidable emptiness problems. 1
On termination for faulty channel machines
 In STACS’08
, 2008
"... Abstract. A channel machine consists of a finite controller together with several fifo channels; the controller can read messages from the head of a channel and write messages to the tail of a channel. In this paper, we focus on channel machines with insertion errors, i.e., machines in whose channel ..."
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Abstract. A channel machine consists of a finite controller together with several fifo channels; the controller can read messages from the head of a channel and write messages to the tail of a channel. In this paper, we focus on channel machines with insertion errors, i.e., machines in whose channels messages can spontaneously appear. Such devices have been previously introduced in the study of Metric Temporal Logic. We consider the termination problem: are all the computations of a given insertion channel machine finite? We show that this problem has nonelementary, yet primitive recursive complexity. 1.
Safety Alternating Automata on Data Words
"... A data word is a sequence of pairs of a letter from a finite alphabet and an element from an infinite set, where the latter can only be compared for equality. Safety oneway alternating automata with one register on infinite data words are considered, their nonemptiness is shown ExpSpacecomplete, a ..."
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Cited by 8 (0 self)
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A data word is a sequence of pairs of a letter from a finite alphabet and an element from an infinite set, where the latter can only be compared for equality. Safety oneway alternating automata with one register on infinite data words are considered, their nonemptiness is shown ExpSpacecomplete, and their inclusion decidable but not primitive recursive. The same complexity bounds are obtained for satisfiability and refinement, respectively, for the safety fragment of linear temporal logic with freeze quantification. Dropping the safety restriction, adding past temporal operators, or adding one more register, each causes undecidability.
Alternating automata on data trees and XPath satisfiability
 ACM Transactions on Computational Logic (TOCL
"... A data tree is an unranked ordered tree whose every node is labelled by a letter from a finite alphabet and an element (“datum”) from an infinite set, where the latter can only be compared for equality. The paper considers alternating automata on data trees that can move downward and rightward, and ..."
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Cited by 7 (0 self)
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A data tree is an unranked ordered tree whose every node is labelled by a letter from a finite alphabet and an element (“datum”) from an infinite set, where the latter can only be compared for equality. The paper considers alternating automata on data trees that can move downward and rightward, and have one register for storing data. The main results are that nonemptiness over finite data trees is decidable but not primitive recursive, and that nonemptiness of safety automata is decidable but not elementary. The proofs use nondeterministic tree automata with faulty counters. Allowing upward moves, leftward moves, or two registers, each cause undecidability. As corollaries, decidability is obtained for two datasensitive fragments of the XPath query language.
A Decidable Temporal Logic of Repeating Values ⋆
"... Abstract. Various logical formalisms with the freeze quantifier have been recently considered to model computer systems even though this is a powerful mechanism that often leads to undecidability. In this paper, we study a lineartime temporal logic with pasttime operators such that the freeze oper ..."
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Abstract. Various logical formalisms with the freeze quantifier have been recently considered to model computer systems even though this is a powerful mechanism that often leads to undecidability. In this paper, we study a lineartime temporal logic with pasttime operators such that the freeze operator is only used to express that some value from an infinite set is repeated in the future or in the past. Such a restriction has been inspired by a recent work on spatiotemporal logics. We show decidability of finitary and infinitary satisfiability by reduction into the verification of temporal properties in Petri nets. This is a surprising result since the logic is closed under negation, contains futuretime and pasttime temporal operators and can express the nonce property and its negation. These ingredients are known to lead to undecidability with a more liberal use of the freeze quantifier. 1
Model Checking Systems and Specifications with Parameterized Atomic Propositions
"... Abstract. In classical LTL model checking, both the system and the specification are over a finite set of atomic propositions. We present a natural extension of this model, in which the atomic propositions are parameterized by variables ranging over some (possibly infinite) domain. For example, by p ..."
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Abstract. In classical LTL model checking, both the system and the specification are over a finite set of atomic propositions. We present a natural extension of this model, in which the atomic propositions are parameterized by variables ranging over some (possibly infinite) domain. For example, by parameterizing the atomic propositions send and receive by a variable x ranging over possible messages, the specification G(send.x → Freceive.x) specifies that not only each send signal is followed by a receive signal, but also that the content of the received message agrees with the content of the one sent. Our extended setting consists of Variable LTL (VLTL) – a specification formalism that extends LTL with atomic propositions parameterized by variables, and abstract systems – systems in which atomic propositions may be parameterized by variables. We study the modelchecking problem in this setting. We show that while the general setting is undecidable, some useful special cases are decidable. In particular, for fragments of VLTL that restrict the quantification over the variables, the model checking is PSPACEcomplete, and thus is not harder than the LTL model checking problem. The latter result conveys the strength and advantage of our setting. 1
Under consideration for publication in Math. Struct. in Comp. Science Relating timed and register automata†
"... Timed automata and register automata are wellknown models of computation over timed and data words respectively. The former has clocks that allow to test the lapse of time between two events, whilst the latter includes registers that can store data values for later comparison. Although these two mo ..."
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Timed automata and register automata are wellknown models of computation over timed and data words respectively. The former has clocks that allow to test the lapse of time between two events, whilst the latter includes registers that can store data values for later comparison. Although these two models behave in appearance differently, several decision problems have the same (un)decidability and complexity results for both models. As a prominent example, emptiness is decidable for alternating automata with one clock or register, both with nonprimitive recursive complexity. This is not by chance. This work confirms that there is indeed a tight relationship between the two models. We show that a run of a timed automaton can be simulated by a register automaton over ordered data domain, and conversely that a run of a register automaton can be simulated by a timed automaton. These are exponential time reductions hold both in the finite and infinite words settings. Our results allow to transfer decidability results back and forth between these two kinds of models, as well complexity results modulo an exponential time reduction. We justify the usefulness of these reductions by obtaining new results on register automata. 1.
www.stacsconf.org ON TERMINATION FOR FAULTY CHANNEL MACHINES
"... Abstract. A channel machine consists of a finite controller together with several fifo channels; the controller can read messages from the head of a channel and write messages to the tail of a channel. In this paper, we focus on channel machines with insertion errors, i.e., machines in whose channel ..."
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Abstract. A channel machine consists of a finite controller together with several fifo channels; the controller can read messages from the head of a channel and write messages to the tail of a channel. In this paper, we focus on channel machines with insertion errors, i.e., machines in whose channels messages can spontaneously appear. Such devices have been previously introduced in the study of Metric Temporal Logic. We consider the termination problem: are all the computations of a given insertion channel machine finite? We show that this problem has nonelementary, yet primitive recursive complexity. 1.