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Hierarchical Interfacebased Supervisory Control: AIP Example for Parallel Case
, 2001
"... In this report we present a large manufacturing example (7:01 10 states) that uses the Hierarchical Interfacebased Supervisory Control method that we presented in [14]. We discuss the application of our method to the Atelier Interetablissement de Productique (AIP), a highly automated manufactu ..."
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In this report we present a large manufacturing example (7:01 10 states) that uses the Hierarchical Interfacebased Supervisory Control method that we presented in [14]. We discuss the application of our method to the Atelier Interetablissement de Productique (AIP), a highly automated manufacturing system. We describe the system, and our supervisor design, closing by discussing the results of successfully applying our method to show that the system is nonblocking and that our supervisors are controllable. This example demonstrates that our method can be applied to interesting systems of realistic complexity that were previously far beyond our means.
Modular verification and supervisory controller design for discreteevent systems using abstraction and incremental construction
, 2008
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Synthesis Method for Hierarchical InterfaceBased Supervisory Control
"... Hierarchical InterfaceBased Supervisory Control (HISC) decomposes a discreteevent system (DES) into a highlevel subsystem which communicates with n ≥ 1 lowlevel subsystems, through separate interfaces. It provides a set of local conditions that can be used to verify global conditions such as non ..."
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Cited by 4 (0 self)
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Hierarchical InterfaceBased Supervisory Control (HISC) decomposes a discreteevent system (DES) into a highlevel subsystem which communicates with n ≥ 1 lowlevel subsystems, through separate interfaces. It provides a set of local conditions that can be used to verify global conditions such as nonblocking and controllability such that the complete system model never needs to be constructed. Currently, a designer must create the supervisors himself and then verify that they satisfy the HISC conditions. In this paper, we develop a synthesis method that can take advantage of the HISC structure. We replace the supervisor for each level by a corresponding specification DES. We then construct for each level a maximally permissive supervisor that satisfies the corresponding HISC conditions. We define a set of language based fixpoint operators and show that they compute the required levelwise supremal languages. We then discuss the complexity of our algorithms and show that they potentially offer significant savings over the monolithic approach. We also briefly discuss a symbolic HISC verification and synthesis method using Binary Decision Diagrams, that we have also developed. A large manufacturing system example (worst case state space on the order of 1030) extended from the AIP example is briefly discussed. The example showed that we can now handle a given level with a statespace as large as 1015 states, using less than 160MB of memory. This represents a significant improvement in the size of systems that can be handled by the HISC approach. A software tool for synthesis and verification of HISC systems using our approach was also developed.
MultiLevel Hierarchical InterfaceBased Supervisory Control
, 2010
"... Hierarchical InterfaceBased Supervisory Control employs interfaces that allow properties of a monolithic system to be verified through local analysis. By avoiding the need to verify properties globally, significant computational savings can be achieved. In this paper we provide local requirements f ..."
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Hierarchical InterfaceBased Supervisory Control employs interfaces that allow properties of a monolithic system to be verified through local analysis. By avoiding the need to verify properties globally, significant computational savings can be achieved. In this paper we provide local requirements for a multilevel architecture employing commandpair type interfaces. This multilevel architecture allows for a greater reduction in complexity and improved reconfigurability over the twolevel case that has been previously studied since it allows the global system to be partitioned into smaller modules. This paper also provides results for synthesizing supervisors in the multilevel architecture that are locally maximally permissive with respect to a given specification and set of interfaces.
Synthesis Method for Hierarchical Interfacebased Supervisory Control Abstract — Hierarchical Interfacebased Supervisory Control
"... (HISC) decomposes a discreteevent system (DES) into a highlevel subsystem which communicates with n ≥ 1 lowlevel subsystems, through separate interfaces which restrict the interaction of the subsystems. It provides a set of local conditions that can be used to verify global conditions such as nonb ..."
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(HISC) decomposes a discreteevent system (DES) into a highlevel subsystem which communicates with n ≥ 1 lowlevel subsystems, through separate interfaces which restrict the interaction of the subsystems. It provides a set of local conditions that can be used to verify global conditions such as nonblocking and controllability. As each clause of the definition can be verified using a single subsystem, the complete system model never needs to be stored in memory, offering potentially significant savings in computational resources. Currently, a designer must create the supervisors himself and then verify that they satisfy the HISC conditions. In this paper, we develop a synthesis method that can take advantage of the HISC structure. We replace the supervisor for each level by a corresponding specification DES. We then do a per level synthesis to construct for each level a maximally permissive supervisor that satisfies the corresponding HISC conditions. We define a set of language based fixpoint operators and show that they compute the required levelwise supremal languages. We then discuss the complexity of the algorithms that we have constructed that implement the fixpoint operators and show that they potentially offer significant improvement over the monolithic approach. A large manufacturing system example (estimated worst case statespace on the order of 10 22) extended from the AIP example is discussed. A software tool for synthesis and verification of HISC systems using our approach was also developed. I.
Symbolic Synthesis and Verification of Hierarchical Interfacebased Supervisory Control Abstract — Hierarchical Interfacebased Supervisory Control
"... (HISC) decomposes a discreteevent system (DES) into a highlevel subsystem which communicates with n ≥ 1 lowlevel subsystems, through separate interfaces which restrict the interaction of the subsystems. It provides a set of local conditions that can be used to verify global conditions such as nonb ..."
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(HISC) decomposes a discreteevent system (DES) into a highlevel subsystem which communicates with n ≥ 1 lowlevel subsystems, through separate interfaces which restrict the interaction of the subsystems. It provides a set of local conditions that can be used to verify global conditions such as nonblocking and controllability. The current HISC verification and synthesis algorithms are based upon explicit state and transition listings which limit the size of a given level to about 10 7 states when 1GB of memory is used. In this paper, we extend the HISC approach by introducing a set of predicate based fixed point operators that allow us to do a per level synthesis to construct for each level a maximally permissive supervisor that satisfies the corresponding HISC conditions. We prove that these fixpoint operators compute the required levelwise supremal languages. We then present algorithms that implement the fixpoint operators. Based on these algorithms, a symbolic implementation is briefly discussed which can be implemented using Binary Decision Diagrams. We also discuss a method to implement our synthesized supervisors in a more compact manner. A large manufacturing system example (worst case state space on the order of 10 30) extended from the AIP example is briefly discussed. The example showed that we can now handle a given level with a statespace as large as 10 15 states, using less than 160MB of memory. This represents a significant improvement in the size of systems that can be handled by the HISC approach. A software tool for synthesis and verification of HISC systems using our approach was also developed. I.
TITLE: Symbolic Decentralized Supervisory Control
"... submitted to the department of computing & software ..."
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