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...free communication for known communication patterns. In [19], memory optimization in single chip network fabrics is explored. The problem of mapping cores onto NoC architectures is addressed in [22], =-=[23]-=-, [26], [27]. In [22], a branch-andbound algorithm is used to map cores onto a mesh-based architecture with the objective of minimizing energy and satisfying the bandwidth constraints of the NoC. A si...

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...ty over time. These choices have significant impact on energy, area and performance metrics of the system. Existing solutions rely on a multi-step approach where mapping is carried out before routing =-=[7, 12, 19]-=-. Routing and mapping objectives do hereby not necessarily coincide. The routing phase must adhere to decisions taken in the mapping phase which invariably limits the routing solution space. Mapping t...

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...hm will also help avoid local hot spots, thereby simplifying SoC thermal management. Researchers have just started to address the issue of energy efficient data routing in tile based on-chip networks =-=[40, 41]-=-. 6. EMERGING TECHNOLOGIES As the importance of a well designed communication architecture to SoC performance and energy consumption is understood, on-chip communication architecture design is attract...

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...hitectures for NoCs. A detailed survey of many of the NoC research works is presented in [3]. Mapping of communication requirements of a system onto a fixed set of NoC topologies is explored in [20], =-=[21]-=-, [14], [15]. In [18] design methodologies for application-specific bus design and in [19], [15], for application-specific NoC topology design are presented. These works are based on average communica...

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...de-offs [5][11]. There exists interesting work in this direction. In [2], Jalabert et al. show the benefits of the network topology customization on the system area, power and latency. The authors of =-=[14]-=-[17] investigate the topological mapping of IPs onto the NoC architectures for bandwidth and communication energy savings. The work presented in this paper follows a different direction by addressing ...

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...t Effort (BE) connections for the remaining traffic streams is presented. The topology selection process and mapping of applications on to NoC architectures have been explored by many researchers. In =-=[10, 11]-=-, branch-and-bound algorithms to map cores on to a mesh NoC topology for different routing functions are presented. In [12, 13], design methods and tools for mapping applications on to regular NoC top...

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...s previous work, in Section III we present our technique, in Section IV we discuss our experimental results, and finally in Section V we conclude the paper. II. PREVIOUS WORK Many researchers [8] [9] =-=[10]-=- [11] have presented core mapping and routing techniques for mesh based NoC architectures. Recently, researchers have begun to address the problem of automated design of application specific NoC archi...

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...nd only briefly discuss how to employ it in practice. Methodologies for derivation of network configurations are presented in [1], [10], [21]–[24]. Design-time algorithms limited to a single use-case =-=[22]-=-–[24] are plentiful. In [10], multiple use-cases are supported by computing a number of hierarchical configurations at design-time. The works in [1], [21] add even more flexibility by deciding the res...

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...ommunication protocols in next generation’s SoCs. With the advent of 90nm and 65nm CMOS technology, the challenges to fix the Network-on-Chip (NoC) issue “by design”, will need: – To provide a functionally-correct, reliable operation of the interconnected components by exploiting appropriate network infrastructure and protocols, i.e. interconnections to be intended as “on chip micro-network” [5][6][7], which is an adaptation of the OSI protocol stack [18]. – To achieve a fluid “flexibility vs. energy-efficiency” system exploration, allowing an effective network centric power management [8][11][12]. Unlike computation energy in fact, Proceedings of the Design, Automation and Test in Europe Conference and Exhibition Designers’ Forum (DATE’04) 1530-1591/04 $20.00 © 2004 IEEE the energy for global communication does not scale down with technology shrinking [3][4]. This makes energy more and more dominant in communications. Reaching those goals will be crucial to the whole semiconductor industry in the next future, in order to face with the escalating range of signal integrity and physical wiring issues, who are making the target IC reliability harder and exponentially expensive to achieve....