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Pessimistic software lock-elision
- In Proceedings of the 26th International Conference on Distributed Computing, DISC’12
, 2012
"... Abstract. Read-write locks are one of the most prevalent lock forms in concur-rent applications because they allow read accesses to locked code to proceed in parallel. However, they do not offer any parallelism between reads and writes. This paper introduces pessimistic lock-elision (PLE), a new app ..."
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Abstract. Read-write locks are one of the most prevalent lock forms in concur-rent applications because they allow read accesses to locked code to proceed in parallel. However, they do not offer any parallelism between reads and writes. This paper introduces pessimistic lock-elision (PLE), a new approach for non-speculatively replacing read-write locks with pessimistic (i.e. non-aborting) soft-ware transactional code that allows read-write concurrency even for contended code and even if the code includes system calls. On systems with hardware trans-actional support, PLE will allow failed transactions, or ones that contain system calls, to preserve read-write concurrency. Our PLE algorithm is based on a novel encounter-order design of a fully pes-simistic STM system that in a variety of benchmarks spanning from counters to trees, even when up to 40 % of calls are mutating the locked structure, provides up to 5 times the performance of a state-of-the-art read-write lock.
Brief announcement: Towards a fully-articulated pessimistic distributed transactional memory
- In Proceedings of SPAA’13: the 25th ACM Symposium on Parallelism in Algorithms and Architectures
, 2013
"... ABSTRACT Transactional memory, an approach aiming to replace cumbersome locking mechanisms in concurrent systems, has become a popular research topic. But due to problems posed by irrevocable operations (e.g., system calls), the viability of pessimistic concurrency control for transactional memory ..."
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ABSTRACT Transactional memory, an approach aiming to replace cumbersome locking mechanisms in concurrent systems, has become a popular research topic. But due to problems posed by irrevocable operations (e.g., system calls), the viability of pessimistic concurrency control for transactional memory systems is being explored, in lieu of the more typical optimistic approach. However, in a distributed setting, where partial transaction failures may happen, the inability of pessimistic transactional memories to roll back is a major shortcoming. Therefore, this paper presents a novel transactional memory concurrency control algorithm that is both fully pessimistic and rollback-capable.
FastLane: Improving Performance of Software Transactional Memory for Low Thread Counts
- In PPoPP
, 2013
"... Software transactional memory (STM) can lead to scalable imple-mentations of concurrent programs, as the relative performance of an application increases with the number of threads that support it. However, the absolute performance is typically impaired by the overheads of transaction management and ..."
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Software transactional memory (STM) can lead to scalable imple-mentations of concurrent programs, as the relative performance of an application increases with the number of threads that support it. However, the absolute performance is typically impaired by the overheads of transaction management and instrumented accesses to shared memory. This often leads STM-based programs with low thread counts to perform worse than a sequential, non-instrumented version of the same application. In this paper, we propose FASTLANE, a new STM algorithm that bridges the performance gap between sequential execution and classical STM algorithms when running on few cores. FASTLANE seeks to reduce instrumentation costs and thus performance degra-dation in its target operation range. We introduce a novel algorithm that differentiates between two types of threads: One thread (the master) executes transactions pessimistically without ever abort-ing, thus with minimal instrumentation and management costs, while other threads (the helpers) can commit speculative transac-tions only when they do not conflict with the master. Helpers thus contribute to the application progress without impairing on the per-formance of the master. We implement FASTLANE as an extension of a state-of-the-art STM runtime system and compiler. Multiple code paths are pro-duced for execution on a single, few, and many cores. The run-time system selects the code path providing the best throughput, depending on the number of cores available on the target machine. Evaluation results indicate that our approach provides promising performance at low thread counts: FASTLANE almost systemati-cally wins over a classical STM in the 1-6 threads range, and often performs better than sequential execution of the non-instrumented version of the same application starting with 2 threads.
P.T.: Atomic RMI: a Distributed Transactional Memory Framework
- In: Proc. HLPP’14 (Jul 2014
"... Abstract This paper presents Atomic RMI, a distributed transactional mem-ory framework that supports the control flow model of execution. Atomic RMI extends Java RMI with distributed transactions that can run on many Java Virtual Machines located on different network nodes. Our system employs SVA, a ..."
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Abstract This paper presents Atomic RMI, a distributed transactional mem-ory framework that supports the control flow model of execution. Atomic RMI extends Java RMI with distributed transactions that can run on many Java Virtual Machines located on different network nodes. Our system employs SVA, a fully-pessimistic concurrency control algorithm that provides exclu-sive access to shared objects and supports rollback and fault tolerance. SVA is capable of achieving a relatively high level of parallelism by interweaving trans-actions that access the same objects and by making transactions that do not share objects independent of one another. It also allows any operations within transactions, including irrevocable ones, like system calls, and provides an un-obtrusive API. Our evaluation shows that in most cases Atomic RMI performs better than fine grained mutual-exclusion and read/write locking mechanisms. Atomic RMI also performs better than an optimistic transactional memory in environments with high contention and a high ratio of write operations, while being competitive otherwise. Keywords concurrency control · distributed systems · software transactional memory 1
Abort Free SemanticTM by Dependency Aware Scheduling of Transactional Instructions (General Track)
"... We present a TM system that executes transactions without ever causing any aborts. The system uses a set of t-var lists, one for each transactional variable. A scheduler undertakes the task of placing the instructions of each transaction in the appropriate t-var lists based on which t-variable each ..."
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We present a TM system that executes transactions without ever causing any aborts. The system uses a set of t-var lists, one for each transactional variable. A scheduler undertakes the task of placing the instructions of each transaction in the appropriate t-var lists based on which t-variable each of them accesses. A set of worker threads are responsible to execute these instructions. Because of the way instructions are inserted in and removed from the lists, by the way the worker threads work, and by the fact that the scheduler places all the instructions of a transaction in the appropriate t-var lists before doing so for the instructions of any subsequent transaction, it follows that no conflict will ever occur. Parallelism is fine-grained since it is achieved at the level of transactional instructions instead of transactions themselves (i.e., the instructions of a transaction may be executed concurrently). 1.
transactions and non-transactional code
, 2012
"... strong isolation between transactions and non-transactional code ..."
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Noname manuscript No. (will be inserted by the editor) Atomic RMI: a Distributed Transactional Memory Framework
"... Abstract This paper presents Atomic RMI, a distributed transactional mem-ory framework that supports the control flow model of execution. Atomic RMI extends Java RMI with distributed transactions that can run on many Java Virtual Machines located on different network nodes. Our system employs SVA, a ..."
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Abstract This paper presents Atomic RMI, a distributed transactional mem-ory framework that supports the control flow model of execution. Atomic RMI extends Java RMI with distributed transactions that can run on many Java Virtual Machines located on different network nodes. Our system employs SVA, a fully-pessimistic concurrency control algorithm that provides exclu-sive access to shared objects and supports rollback and fault tolerance. SVA is capable of achieving a relatively high level of parallelism by interweaving trans-actions that access the same objects and by making transactions that do not share objects independent of one another. It also allows any operations within transactions, including irrevocable ones, like system calls, and provides an un-obtrusive API. Our evaluation shows that in most cases Atomic RMI performs better than fine grained mutual-exclusion and read/write locking mechanisms. Atomic RMI also performs better than an optimistic transactional memory in environments with high contention and a high ratio of write operations, while being competitive otherwise. Keywords concurrency control · distributed systems · software transactional memory 1
The Push/Pull model of transactions
"... We present a general theory of serializability, unifying a wide range of transactional algorithms, including some that are yet to come. To this end, we provide a compact semantics in which concurrent transactions push their effects into the shared view (or unpush to recall effects) and pull the effe ..."
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We present a general theory of serializability, unifying a wide range of transactional algorithms, including some that are yet to come. To this end, we provide a compact semantics in which concurrent transactions push their effects into the shared view (or unpush to recall effects) and pull the effects of potentially uncommitted concurrent transactions into their local view (or unpull to detangle). Each operation comes with simple side-conditions given in terms of commutativity (Lipton’s left-movers and right-movers [24]). The benefit of this model is that most of the elaborate reasoning (coinduction, simulation, subtle invariants, etc.) necessary for proving the serializability of a transactional algorithm is already proved within the semantic model. Thus, proving serializability (or opacity) amounts simply to mapping the algorithm on to our rules, and showing that it satisfies the rules ’ side-conditions. 1