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22
A Survey of Boolean Matching Techniques for Library Binding
 ACM Transactions on Design Automation of Electronic Systems
, 1997
"... When binding a logic network to a set of cells, a fundamental problem is recognizing whether a cell can implement a portion of the network. Boolean... ..."
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Cited by 29 (2 self)
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When binding a logic network to a set of cells, a fundamental problem is recognizing whether a cell can implement a portion of the network. Boolean...
Fast ofdd based minimization of fixed polarity reedmuller expressions
 In European Design Automation Conf
, 1994
"... We prerent methods to minimize F&d Polarity Reedhiuller ezpnrrionr (FPRMr), i.e. tlevel jized polarity AND/RXOR canonical rcpnrcntatiow of Boolean functionr, uring Ordered l&actional De&ion Diagnamr (OFDDE). We investigate the close relation between both npnrentationr and uee eficie ..."
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Cited by 29 (16 self)
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We prerent methods to minimize F&d Polarity Reedhiuller ezpnrrionr (FPRMr), i.e. tlevel jized polarity AND/RXOR canonical rcpnrcntatiow of Boolean functionr, uring Ordered l&actional De&ion Diagnamr (OFDDE). We investigate the close relation between both npnrentationr and uee eficient algorithmr on OFDDI for ezact and heutirtic minimization of FPRMz. In contrtut to pnviov~rlg published methoda our algorithm can alro handle circuit8 with reveral outpuk. Ezpcrimental nrultr on large benchmarkr are given to rhow the eficiency of our appmch. 1 Iutroduction The high complezity of modem VLSI circuitry has shown an increasing demand for synthesis tools. In the
How Many Decomposition Types Do We Need
 In European Design and Test Conference (EDTC
, 1995
"... Decision Diagrams (DDs) are used in many applications in CAD. Various types of DDs, e.g. BDDs, FDDs, KFDDs, di er by their decomposition types. In this paper we investigate the di erent decomposition types and prove that there are only three that really help to reduce the size of DDs. 1 ..."
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Cited by 24 (7 self)
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Decision Diagrams (DDs) are used in many applications in CAD. Various types of DDs, e.g. BDDs, FDDs, KFDDs, di er by their decomposition types. In this paper we investigate the di erent decomposition types and prove that there are only three that really help to reduce the size of DDs. 1
Constructive multilevel synthesis by way of functional properties
 Ph.D. dissertation, Comput. Sci. Eng., Univ. Michigan, Ann Arbor
, 2001
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Dynamic Minimization of OKFDDs
, 1995
"... We present methods for the construction of small Ordered Kronecker Functional Decision Diagrams (OKFDDs). OKFDDs are a generalization of Ordered Binary Decision Diagrams (OBDDs) and Ordered Functional Decision Diagrams (OFDDs) as well. Our approach is based on dynamic variable ordering and decomposi ..."
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Cited by 11 (9 self)
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We present methods for the construction of small Ordered Kronecker Functional Decision Diagrams (OKFDDs). OKFDDs are a generalization of Ordered Binary Decision Diagrams (OBDDs) and Ordered Functional Decision Diagrams (OFDDs) as well. Our approach is based on dynamic variable ordering and decomposition type choice. For changing the decomposition type we use a new method. We briefly discuss the implementation of PUMA, our OKFDD package. The quality of our methods in comparison with sifting and interleaving for OBDDs is demonstrated based on experiments performed with PUMA. 1 Introduction Decision Diagrams (DDs) are often used in CAD systems for efficient representation and manipulation of Boolean functions. The most popular data structure in this context are Ordered Binary Decision Diagrams (OBDDs) [5] that are used in many applications [6]. Nevertheless, some relevant classes of Boolean functions cannot be represented efficiently by OBDDs [2, 17]. As one alternative Ordered Function...
OKFDDs versus OBDDs and OFDDs
, 1995
"... Ordered Decision Diagrams (ODDs) as a means for the representation of Boolean functions are used in many applications in CAD. Depending on the decomposition type, various classes of ODDs have been defined, the most important being the Ordered Binary Decision Diagrams (OBDDs), the Ordered Functiona ..."
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Cited by 9 (5 self)
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Ordered Decision Diagrams (ODDs) as a means for the representation of Boolean functions are used in many applications in CAD. Depending on the decomposition type, various classes of ODDs have been defined, the most important being the Ordered Binary Decision Diagrams (OBDDs), the Ordered Functional Decision Diagrams (OFDDs) and the Ordered Kronecker Functional Decision Diagrams (OKFDDs). In this paper we clarify the computational power of OKFDDs versus OBDDs and OFDDs from a (more) theoretical point of view. We prove several exponential gaps between specific types of ODDs. Combining these results it follows that a restriction of the OKFDD concept to subclasses, such as OBDDs and OFDDs as well, results in families of functions which lose their efficient representation.
Sympathy: Fast Exact Minimization of Fixed Polarity ReedMuller Expressions for Symmetric Functions
"... In this paper a polynomial time algorithm for the ..."
A.: On variable ordering and decomposition type choice in OKFDDs
 In: IEEE Trans Comp
, 1998
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Using BDDs to Design ULMs for FPGAs
 Proceedings of ACM/SIGDA FPGA96
, 1996
"... Many modern FPGAs use lookup table (LUT) logic blocks which can be programmed to realize any function of a fixed number of inputs. Since permutations and negation of signals are virtually costless operations in FPGAs, it is possible to employ logic blocks that realize only a subset of all functions, ..."
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Cited by 5 (0 self)
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Many modern FPGAs use lookup table (LUT) logic blocks which can be programmed to realize any function of a fixed number of inputs. Since permutations and negation of signals are virtually costless operations in FPGAs, it is possible to employ logic blocks that realize only a subset of all functions, while the rest can be obtained by permuting and negating the inputs. Such blocks, known as Universal Logic Modules (ULMs), have only recently been considered for application in FPGAs. In this paper we propose a class of ULMs useful in the FPGA environment. Methodology for systematic development of such blocks is presented, based on BDD description of logic functions. We give an explicit construction of a 3input LUT replacement that requires only 5 programming bits, which is the optimum for such ULMs. A realistic size 4input LUT replacement is obtained which uses 13 programming bits. Such logic blocks are especially important when FPGAs are used in a reconfigurable manner, because they can...
Generalized Symmetries in Boolean Functions: Fast Computation and Application to Boolean Matching
 in IWLS
, 2004
"... In recent years, the notion of symmetry has been extended from classical symmetries to also include constant cofactor symmetries, single variable symmetries and Kronecker symmetries. All these symmetries form a generalized symmetry scheme. Existing methods to detect generalized symmetries require co ..."
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In recent years, the notion of symmetry has been extended from classical symmetries to also include constant cofactor symmetries, single variable symmetries and Kronecker symmetries. All these symmetries form a generalized symmetry scheme. Existing methods to detect generalized symmetries require computing the cofactors for each pair of variables to check certain relationships between the cofactors. In this paper, we present a new algorithm that detects all pairs of symmetric variables in one pass over a multioutput BDD. Experiments on the MCNC benchmarks are encouraging. We also propose a potential application of generalized symmetries in Boolean matching. Keywords: Kronecker symmetries, generalized symmetries, Boolean matching.