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...itations of current interface-based design methods. This is a multiprocessor SoC design approach using a communication refinement methodology based on virtual components [12] [13] [14] [15] [16] [17] =-=[18]-=- [19]. In this methodology, the system is described as a set of virtual components interconnected via channels. A virtual component consists of a wrapper and an internal component. The internal compon...

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...fferent manufacturers and sources. As a consequence, the blocks might have been modeled at different levels of abstraction and provide different communication interfaces. So-called wrappers/ adapters =-=[126, 106]-=- are needed for simulation and synthesis to fit components together, which can affect hardware and software parts of the system. Knowledge from interface synthesis [75, 108, 89, 86] can be reused for ...

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...th the work of Pai Chou et al., which did not generate customized SoC bus architectures but rather assumed that such bus architectures are already available (e.g., a CAN bus). Several efforts [11][12]=-=[13]-=-[14][15][16][17] from TIMA Lab presented a component-based design flow for a heterogeneous multi-core SoC. Their design flow introduces a systematic method of wrapper generation for multi-core SoC des...

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...ol. In the embedded SoC domain, design methodology for an application specific multiprocessor SoC has been proposed with the concept of a wrapper to overcome the problem of incompatible bus protocols =-=[20, 21]-=-. Wrappers allow automatic adaptation of physical interfaces to a communication network. Generic wrapper architectures and automatic generation method have been proposed to facilitate the integration ...

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...he key issue is then to adapt the physical interface of these components to the logical interface. Wrappers have been widely used to solve this problem for simulation and/or synthesis 26[4][8][9][10]=-=[13]-=-. In the simulation step, a BFM (bus functional model) encapsulates a memory functional model with a cycle accurate interface [4][8]. In [9], a wrapper for mixed-level cosimulation between FIFO channe...

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...e mapped onto different architectures. Transaction level modelling was first introduced in hardware specification languages in SpecC [11], and later developed under the name of behavioral wrappers in =-=[10]-=- and as Functional Interface by the VSIA [4]. 1.2 TLM and functional modelling in SystemC 2.0 SystemC [1] [6] [8] [7], starting from its version 2.0, introduced the following language elements to supp...

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...ersion ATM Layer CPU1 language. Depending on the difference, and on the values of the architecture configuration parameters, the functionality of the wrapper is determined and automatically generated =-=[14]-=-. The wrapper is composed of an interface made of two sets of ports: internal and external ports. It constitutes the interface of the module and isolates the behavior from the rest of the system. M1.1...

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...s to present a casesstudy applying a multi-domain and multi-languagescosimulation methodology for the validation of asheterogeneous system, the optical MEM switch.sThisscosimulation methodology [12], =-=[13]-=-, [14] starts with assystem model given as a netlist of heterogeneousscomponents and enables automatic generation ofssimulation models for heterogeneous systems.sThis paper is organized as follows. Th...