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25
On the properties of artificial development and its use in evolvable hardware
- in Proc. IEEE Symp. Series Comput. Intell
, 2009
"... Abstract — The design of a new biologically inspired artificial developmental system is described in this paper. In general, developmental systems converge slower and are more compu-tationally expensive than direct evolution. However, the perfor-mance trends of development indicate that the full ben ..."
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Abstract — The design of a new biologically inspired artificial developmental system is described in this paper. In general, developmental systems converge slower and are more compu-tationally expensive than direct evolution. However, the perfor-mance trends of development indicate that the full benefit of development will arise with larger and more complex problems that exhibit some sort of regularity in their structure: thus, the aim is to evolve larger electronic systems through the modu-larity allowed by development. The hope is that the proposed artificial developmental system will exhibit adaptivity and fault tolerance in the future. The cell signalling and the system of Gene Regulatory Networks present in biological organisms are modelled in our developmental system, and tailored for tackling real world problems on electronic hardware. For the first time, a Gene Regulatory Network system is successfully shown to develop the complete circuit structure of a desired digital circuit without the help of another mechanism or any problem specific structuring. Experiments are presented that show the modular behaviour of the developmental system, as well as its ability to solve non-modular circuit problems. I.
A Novel Genetic Algorithm for Evolvable Hardware
, 2006
"... Abstract—Evolutionary algorithms are used for solving search and optimization problems. A new field in which they are also applied is evolvable hardware, which refers to a self-configurable electronic system. However, evolvable hardware is not widely recognized as a tool for solving real-world appli ..."
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Abstract—Evolutionary algorithms are used for solving search and optimization problems. A new field in which they are also applied is evolvable hardware, which refers to a self-configurable electronic system. However, evolvable hardware is not widely recognized as a tool for solving real-world applications, because of the scalability problem, which limits the size of the system that may be evolved. In this paper a new genetic algorithm, particularly designed for evolving logic circuits, is presented and tested for its scalability. The proposed algorithm designs and optimizes logic circuits based on a Programmable Logic Array (PLA) structure. Furthermore it allows the evolution of large logic circuits, without the use of any decomposition techniques. The experimental results, based on the evolution of several logic circuits taken from three different benchmarks, prove that the proposed algorithm is very fast, as only a few generations are required to fully evolve the logic circuits. In addition it optimizes the evolved circuits better than the optimization offered by other evolutionary algorithms based on a PLA and FPGA structures. T I.
Hierarchical Genetic Programming Based on Test Input Subsets
"... Crucial to the more widespread use of evolutionary computation techniques is the ability to scale up to handle complex problems. In the field of genetic programming, a number of decomposition and reuse techniques have been devised to address this. As an alternative to the more commonly employed enca ..."
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Crucial to the more widespread use of evolutionary computation techniques is the ability to scale up to handle complex problems. In the field of genetic programming, a number of decomposition and reuse techniques have been devised to address this. As an alternative to the more commonly employed encapsulation methods, we propose an approach based on the division of test input cases into subsets, each dealt with by an independently evolved code segment. Two program architectures are suggested for this hierarchical approach, and experimentation demonstrates that they offer substantial performance improvements over more established methods. Difficult problems such as even-10 parity are readily solved with small population sizes.
An Investigation of the Importance of Mechanisms and Parameters in a Multi-cellular Developmental System
- IEEE Transactions on Evolutionary Computation
"... Abstract—Multicellular organisms in biology possess invalu-able characteristics, which artificial systems in engineering lack, such as adaptivity and robustness. Modeling biologically inspired multicellular developmental systems in evolutionary computa-tion have been considered for a number of years ..."
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Abstract—Multicellular organisms in biology possess invalu-able characteristics, which artificial systems in engineering lack, such as adaptivity and robustness. Modeling biologically inspired multicellular developmental systems in evolutionary computa-tion have been considered for a number of years, and there exist many developmental simulations that capture multicellular characteristics of biological organisms. However, the relative importance of many mechanisms in such models is still poorly understood. This paper undertakes a detailed investigation of the importance of many mechanisms and parameters on the organizational behavior of a gene regulatory network based artificial developmental system via classical pattern matching experiments. The work leads to an improved understanding of artificial multicellular development, which will assist in its utilization in the application of evolutionary computation. It may also provide a better understanding of mechanisms of biological development. Index Terms—Artificial development, computational evolution, diffusion, evolvability, gene regulatory network. I.
A scalable solution to n-bit parity via artificial development
- in Proc. 5th Int. Conf. Ph.D. Res. Microelectron. Electron., 2009
"... Abstract — The design of electronic circuits with model-free heuristics like evolutionary algorithms is an attractive concept and field of research. Although successful to a point, evolution of circuits that are bigger than a 3-bit multiplier is hindered by the scalability problem. Modelling the bio ..."
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Abstract — The design of electronic circuits with model-free heuristics like evolutionary algorithms is an attractive concept and field of research. Although successful to a point, evolution of circuits that are bigger than a 3-bit multiplier is hindered by the scalability problem. Modelling the biological development as an artificial genotype-phenotype mapping mechanism has been shown to improve scalability on some simple circuit problems and pattern formations. As a candidate solution to the scalability issue, an artificial developmental system is presented. The presented artificial developmental system is shown to develop a scalable parity circuit, which could be infinitely developed to build a growing parity circuit, hence, represents a general, scalable solution to n-bit parity. The result obtained further supports the artificial develop-mental system as a good candidate solution to the scalability problem in evolvable hardware. I.
Genetic Programming Track
"... Embedded Cartesian Genetic Programming (ECGP) is an extension of Cartesian Genetic Programming (CGP) that can automatically acquire, evolve and re-use partial solutions in the form of modules. In this paper, we introduce for the first time a new multi-chromosome approach to CGP and ECGP that allows ..."
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Embedded Cartesian Genetic Programming (ECGP) is an extension of Cartesian Genetic Programming (CGP) that can automatically acquire, evolve and re-use partial solutions in the form of modules. In this paper, we introduce for the first time a new multi-chromosome approach to CGP and ECGP that allows difficult problems with multiple outputs to be broken down into many smaller, simpler problems with single outputs, whilst still encoding the entire solution in a single genotype. We also propose a multi-chromosome evolutionary strategy which selects the best chromosomes from the entire population to form the new fittest individual, which may not have been present in the population. The multi-chromosome approach to CGP and ECGP is tested on a number of multiple output digital circuits. Computational Effort figures are calculated for each problem and compared against those for CGP and ECGP. The results indicate that the use of multiple chromosomes in both CGP and ECGP provide a significant performance increase on all problems tested.
Feasibility of the Evolutionary Algorithm using Different Behaviours of the Mutation Rate to Design Simple Digital Logic Circuits
"... Abstract—The evolutionary design of electronic circuits, or evolvable hardware, is a discipline that allows the user to automatically obtain the desired circuit design. The circuit configuration is under the control of evolutionary algorithms. Several researchers have used evolvable hardware to desi ..."
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Abstract—The evolutionary design of electronic circuits, or evolvable hardware, is a discipline that allows the user to automatically obtain the desired circuit design. The circuit configuration is under the control of evolutionary algorithms. Several researchers have used evolvable hardware to design electrical circuits. Every time that one particular algorithm is selected to carry out the evolution, it is necessary that all its parameters, such as mutation rate, population size, selection mechanisms etc. are tuned in order to achieve the best results during the evolution process. This paper investigates the abilities of evolution strategy to evolve digital logic circuits based on programmable logic array structures when different mutation rates are used. Several mutation rates (fixed and variable) are analyzed and compared with each other to outline the most appropriate choice to be used during the evolution of combinational logic circuits. The experimental results outlined in this paper are important as they could be used by every researcher who might need to use the evolutionary algorithm to design digital logic circuits. Keywords—Evolvable hardware, evolutionary algorithm, digital logic circuit, mutation rate. I.
Chapter 1 CARTESIAN GENETIC PROGRAMMING AND THE POST DOCKING FILTERING PROBLEM
"... Abstract Structure-based virtual screening is a technology increasingly used in drug discovery. Although successful at estimating binding modes for input ligands, these technologies are less successful at ranking true hits correctly by binding free energy. This chapter presents the automated removal ..."
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Abstract Structure-based virtual screening is a technology increasingly used in drug discovery. Although successful at estimating binding modes for input ligands, these technologies are less successful at ranking true hits correctly by binding free energy. This chapter presents the automated removal of false positives from virtual hit sets, by evolving a post docking filter using Cartesian Genetic Programming. We also investigate characteristics of CGP for this problem and confirm the absence of bloat and the usefulness of neutral drift.
Improving the Evolvability of Digital Multipliers using Embedded Cartesian Genetic Programming and Product Reduction
"... Abstract. Embedded Cartesian Genetic Programming (ECGP) is a form of Genetic Programming based on an acyclic directed graph representation. In this paper we investigate the use of ECGP together with a technique called Product Reduction (PR) to reduce the time required to evolve a digital multiplier. ..."
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Abstract. Embedded Cartesian Genetic Programming (ECGP) is a form of Genetic Programming based on an acyclic directed graph representation. In this paper we investigate the use of ECGP together with a technique called Product Reduction (PR) to reduce the time required to evolve a digital multiplier. The results are compared with Cartesian Genetic Programming (CGP) with and without PR and show that ECGP improves evolvability and also that PR improves the performance of both techniques by up to eight times on the digital multiplier problems tested. 1
