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22
VLSI Architecture and Chip for Combined Invisible Robust and Fragile Watermarking
, 2007
"... Research in digital watermarking is mature. Several software implementations of watermarking algorithms are described in the literature, but few attempts have been made to describe hardware implementations. The ultimate objective of the research presented in this paper was to develop low-power, high ..."
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Cited by 9 (0 self)
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Research in digital watermarking is mature. Several software implementations of watermarking algorithms are described in the literature, but few attempts have been made to describe hardware implementations. The ultimate objective of the research presented in this paper was to develop low-power, high- performance, real-time, reliable and secure watermarking systems, which can be achieved through hardware implementations. In this paper, we discuss the development of a very-large-scale integration architecture for a high-performance watermarking chip that can perform both invisible robust and invisible fragile image watermarking in the spatial domain. We prototyped the watermarking chip in two ways: (i) by using a Xilinx field-programmable gate array and (ii) by building a custom integrated circuit. To the best of our knowledge, this prototype is the first watermarking chip with both invisible robust and invisible fragile watermarking capabilities. I.
VLSI Implementation of Invisible Digital Watermarking Algorithms towards the Development of a Secure JPEG Encoder
- In: Proceedings of the IEEE Workshop on Signal Processing Systems. (2003) 183–188 Based Implementation of an Invisible-Robust Image Watermarking Encoder 353
, 2003
"... Digital watermarking is the process that embeds data called a watermark into a multimedia object such that the watermark can be detected or extracted later to make an assertion about the object. Several software implementations of the proposed algorithms are available, but very few attempts have bee ..."
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Cited by 8 (3 self)
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Digital watermarking is the process that embeds data called a watermark into a multimedia object such that the watermark can be detected or extracted later to make an assertion about the object. Several software implementations of the proposed algorithms are available, but very few attempts have been made for hardware implementation. The goal of hardware implementation is to achieve low power, high performance, and reliability. In this paper, we develop hardware system that can insert both robust and fragile invisible watermarks in images. The hardware module can be easily incorporated into a JPEG encoder to develop a secure JPEG encoder. A prototype chip is implemented using CMOS technology. To our knowledge, this is the first watermarking chip implementing both invisible-robust and invisible-fragile watermarking capabilities.
A Dual Voltage-Frequency VLSI Chip for Image Watermarking in DCT Domain
- IEEE Transactions on Circuits and Systems II (TCAS-II
, 2006
"... In this paper, we present a new VLSI architecture that can insert invisible or visible watermarks in images in the DCT domain. Several low power design techniques such as dual voltages, dual frequency and clock gating have been incorporated in the architecture to reduce the power consumption. The su ..."
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In this paper, we present a new VLSI architecture that can insert invisible or visible watermarks in images in the DCT domain. Several low power design techniques such as dual voltages, dual frequency and clock gating have been incorporated in the architecture to reduce the power consumption. The supply voltage levels and the operating frequencies are chosen such that there is a throughput and bandwidth match between low and high operating frequency modules. The proposed architecture exploits pipelining and parallelism extensively in order to achieve high performance. A prototype VLSI chip has been designed and verified using various Cadence and Synopsys tools based on TSMC 0.25 technology with 1.4M transistors and 0.3mW of average dynamic power.
FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder
, 2004
"... Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. While encryption transforms original multimedia object into another form, digital watermarking leaves the original object intact ..."
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Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. While encryption transforms original multimedia object into another form, digital watermarking leaves the original object intact and recognizable. The objective is to develop low power, real time, reliable and secure watermarking systems, which can be achieved through hardware implementations.
Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
- University of Central Florida, Orlando in
, 2005
"... In this paper, we propose a VLSI architecture and provide prototype implementation of a chip that can insert both invisible and visible watermarks in DCT domain. To our knowledge, this is the firstever low power watermarking chip having such watermarking functionalities. Various techniques, such as ..."
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Cited by 3 (1 self)
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In this paper, we propose a VLSI architecture and provide prototype implementation of a chip that can insert both invisible and visible watermarks in DCT domain. To our knowledge, this is the firstever low power watermarking chip having such watermarking functionalities. Various techniques, such as multiple voltages, multiple frequency, and clock gating are incorporated to reduce power consumption of the chip. The proposed architecture has a three stage pipeline structure and also uses parallelism to improve the overall performance. A prototype chip is designed and verified using various Cadence and Synopsys tools using TSMC ##### technology. It runs at a dual frequency of ###### and ##### and at a dual voltage of #### and #### and contains #### transistors. The average power consumption of the chip is estimated to be ##### , which is five times less than its single supply voltage and single frequency operation.
Robust Digital Cinema Watermarking
"... Abstract—With the advent of digital cinema and digital broadcasting, copyright protection of video data has been one of the most important issues. We present a novel method of watermarking for video image data based on the hardware and digital wavelet transform techniques and name it as “traceable w ..."
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Abstract—With the advent of digital cinema and digital broadcasting, copyright protection of video data has been one of the most important issues. We present a novel method of watermarking for video image data based on the hardware and digital wavelet transform techniques and name it as “traceable watermarking ” because the watermarked data is constructed before the transmission process and traced after it has been received by an authorized user. In our method, we embed the watermark to the lowest part of each image frame in decoded video by using a hardware LSI. Digital Cinema is an important application for traceable watermarking since digital cinema system makes use of watermarking technology during content encoding, encryption, transmission, decoding and all the intermediate process to be done in digital cinema systems. The watermark is embedded into the randomly selected movie frames using hash functions. Embedded watermark information can be extracted from the decoded video data. For that, there is no need to access original movie data. Our experimental results show that proposed traceable watermarking method for digital cinema system is much better than the convenient watermarking techniques in terms of robustness, image quality, speed, simplicity and robust structure.
Hardware Implementation of a Digital Watermarking System for Video Authentication
"... Abstract—This paper presents a hardware implementation of a digital watermarking system that can insert invisible, semifragile watermark information into compressed video streams in real time. The watermark embedding is processed in the discrete cosine transform domain. To achieve high performance, ..."
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Abstract—This paper presents a hardware implementation of a digital watermarking system that can insert invisible, semifragile watermark information into compressed video streams in real time. The watermark embedding is processed in the discrete cosine transform domain. To achieve high performance, the proposed system architecture employs pipeline structure and uses parallelism. Hardware implementation using field programmable gate array has been done, and an experiment was carried out using a custom versatile breadboard for overall performance evaluation. Experimental results show that a hardware-based video authentication system using this watermarking technique features minimum video quality degradation and can withstand certain potential attacks, i.e., cover-up attacks, cropping, and segment removal on video sequences. Furthermore, the proposed hardwarebased watermarking system features low power consumption, low cost implementation, high processing speed, and reliability. Index Terms—Digital video watermarking, hardware implementation, real-time data hiding, very large scale integration (VLSI), video authentication. I.
VLSI Implementation of Visible Watermarking for a Secure Digital Still Camera Design
- In: Proceedings of the 17th International Conference on VLSI Design
, 2004
"... Watermarking is the process that embeds data called a watermark into a multimedia object for its copyright protection. The digital watermarks can be visible to a viewer on careful inspection or completely invisible and cannot be easily recovered without an appropriate decoding mechanism. Digital ima ..."
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Cited by 1 (1 self)
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Watermarking is the process that embeds data called a watermark into a multimedia object for its copyright protection. The digital watermarks can be visible to a viewer on careful inspection or completely invisible and cannot be easily recovered without an appropriate decoding mechanism. Digital image watermarking is a computationally intensive task and can be speeded up sigificantly by implementing in hardware. In this work, we describe a new VLSI architecture for implementing two different visible watermarking schemes for images. The proposed hardware can insert on-the-fly either one or both watermarks into an image depending on the application requirement. The proposed circuit can be integrated into any existing digital still camera framework. First, separate architectures are derived for the two watermarking schemes and then integrated into a unified architecture. A prototype CMOS VLSI chip was designed and verified implementing the proposed architecture and reported in this paper. To our knowledge, this is the first VLSI architecture for implementing visible watermarking schemes.
An Image-in-Image communication scheme and VLSI implementation using FPGA
, 2004
"... The proliferation of the digitized media (audio, image and video) introduces a challenging problem of security in data transmission in the network environment. In this paper a novel algorithm that serves the purpose of covert image-in-image communication and its VLSI implementation using FPGA is pro ..."
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The proliferation of the digitized media (audio, image and video) introduces a challenging problem of security in data transmission in the network environment. In this paper a novel algorithm that serves the purpose of covert image-in-image communication and its VLSI implementation using FPGA is proposed. Channel coding and spatial bi-phase modulation scheme are used to map gray-scale image information into a binary equivalent message that extracts message information from the noise less/noisy version of the cover data. Implementation of the proposed low cost algorithm may be speeded up significantly by hardware realization and can be used for real time applications of multimedia data transmission. VLSI implementation using Field Programmable Gate Array (FPGA) has been developed for the algorithms and circuit can be integrated into the existing digital still camera framework.
DWT Based Robust Watermarking Embed Using CRC-32 Techniques
"... Abstract—As far as the latest technological improvements are concerned, digital systems more become popular than the past. Despite this growing demand to the digital systems, content copy and attack against the digital cinema contents becomes a serious problem. To solve the above security problem, w ..."
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Abstract—As far as the latest technological improvements are concerned, digital systems more become popular than the past. Despite this growing demand to the digital systems, content copy and attack against the digital cinema contents becomes a serious problem. To solve the above security problem, we propose “traceable watermarking using Hash functions for digital cinema system. Digital Cinema is a great application for traceable watermarking since it uses watermarking technology during content play as well as content transmission. The watermark is embedded into the randomly selected movie frames using CRC-32 techniques. CRC-32 is a Hash function. Using it, the embedding position is distributed by Hash Function so that any party cannot break off the watermarking or will not be able to change. Finally, our experimental results show that proposed DWT watermarking method using CRC-32 is much better than the convenient watermarking techniques in terms of robustness, image quality and its simple but unbreakable algorithm.
