Abstract—Scalability considerations drive the evolution of switch design from output queuing to input queuing and further to combined input and crosspoint queuing (CICQ). However, CICQ switches with credit-based flow control face new challenges of scalability and predictability. In this paper, we propose a novel approach of rate-based smoothed switching, and design a CICQ switch called the smoothed buffered crossbar or sBUX. First, the concept of smoothness is developed from two complementary perspectives of covering and spacing, which, commonly known as fairness and jitter, are unified in the same model. Second, a smoothed multiplexer sMUX is designed that allocates bandwidth among competing flows sharing a link and guarantees almost ideal smoothness for each flow. Third, the buffered crossbar sBUX is designed that uses the scheduler sMUX at each input and output, and a two-cell buffer at each crosspoint. It is proved that sBUX guarantees 100 % throughput for real-time services and almost ideal smoothness for each flow. Fourth, an on-line bandwidth regulator is designed that periodically estimates bandwidth demand and generates admissible allocations, which enables sBUX to support best-effort services. Simulation shows almost 100 % throughput and multi-microsecond average delay. In particular, neither credit-based flow control nor speedup is used, and arbitrary fabric-internal latency is allowed between line cards and the switch core, simplifying the switch implementation. Index Terms—Buffered crossbar, scheduling, smoothness, switches.

Abstract—This paper calls for rethinking packet-switch architectures by cutting all dependencies between the switch fabric and the linecards. Most single-stage packet-switch architectures rely on an instantaneous communication between the switch fabric and the linecards. Today, however, this assumption is breaking down, because effective propagation times are too high and keep increasing with the line rates. In this paper, we argue for a self-sufficient switch fabric by moving all the buffering from the linecards to the switch fabric. We introduce the crosspoint-queued (CQ) switch, a new bufferedcrossbar switch architecture with large crosspoint buffers and no input queues, and show how it can be readily implemented in a single SRAM-based chip using current technology. For a crosspoint buffer size of one, we provide a closed-form throughput formula for all work-conserving schedules under uniform Bernoulli i.i.d. arrivals. Furthermore, we study the performance of the switch for larger buffer sizes and show that it nearly behaves as an ideal output-queued switch. Finally, we confirm our results using synthetic as well as trace-based simulations. I.

Abstract not found

Abstract—This paper calls for rethinking packet-switch architectures, by cutting all dependencies between the switch fabric and the linecards. Most single-stage packet-switch architectures rely on an instantaneous communication between the switch fabric and the linecards. Today, however, this assumption is breaking down, because effective propagation times are too high and keep increasing with the line rates. In this paper, we argue for a self-sufficient switch fabric, by moving all the buffering from the linecards to the switch fabric. We introduce the crosspoint-queued (CQ) switch, a new bufferedcrossbar switch architecture with large crosspoint buffers and no input queues. We study the performance of the switch and show that it nearly behaves as an ideal output-queued switch as the buffer size increases. Further, with a small crosspoint buffer size, we provide a closed-form throughput formula for all work-conserving schedules with uniform Bernoulli i.i.d. arrivals. Finally, we show how the CQ switch can be practically implemented in a single SRAM-based chip. A. Background I.

Abstract—A rate-based switch fabric called smoothed buffer crossbar has been proposed in our recent work. It can provide 100 % rate-guaranteed service with only a two-cell buffer at each crosspoint, and can also support best-effort service with an additional bandwidth regulator. However, the widely used max-flow model for bandwidth regulation is neither scalable nor of 100 % throughput. In order to evaluate the performance of bandwidth regulator, we first introduce the 100 % ideal throughput measurement in this paper. Then we prove that the total arrival average (TAA) algorithm has got this property, which does not happen in the max-flow allocation. Then an O(N) algorithm called proportion scaling allocation (PSA) is presented. Simulations reveal that PSA can deliver nearly 100 % throughput even in a frequently changing traffic pattern. As a comparison, both theoretical and experimental evidences are given to show the inefficiency of the max-flow model. Index Terms—switch fabric, rate-based switching, bandwidth regulation, scheduling. I.