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Implementing a STARI Chip
"... STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2µ CMOS process. In a simple test xture, it operates at data rates of 120 Mbits/sec over a pair of wires. Because STARI uses both synchronous ..."
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Cited by 25 (2 self)
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STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2µ CMOS process. In a simple test xture, it operates at data rates of 120 Mbits/sec over a pair of wires. Because STARI uses both
Developing Standards for Reporting Phase IV Implementation studies (StaRI) Investigators
"... 2Table of contents ..."
STARI: A Case Study in Compositional and Hierarchical Timing Verification
- in O. Grumberg (Ed.) Proc. CAV'97, 191-201, LNCS 1254
, 1997
"... . In [TAKB96], we investigated techniques for checking if one real-time system correctly implements another and developed theory for hierarchical proofs and assume-guarantee style reasoning. In this study, using the techniques of [TAKB96], we verify the correctness of the timing of the communication ..."
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Cited by 15 (1 self)
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. In [TAKB96], we investigated techniques for checking if one real-time system correctly implements another and developed theory for hierarchical proofs and assume-guarantee style reasoning. In this study, using the techniques of [TAKB96], we verify the correctness of the timing
Efficient Verification of Timed Automata using Dense and Discrete Time Semantics
"... In this paper we argue that the semantic issues of discrete vs. dense time should be separated as much as possible from the pragmatics of state-space representation. Contrary to some misconceptions, the discrete semantics is not inherently bound to use state-explosive techniques any more than the de ..."
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Cited by 27 (5 self)
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-tolerant communication between two synchronous systems. Using discrete time and BDDs we were able to prove correctness of a STARI implementation with 18 stages (55 clocks), better than what has been achieved using other techniques. The verification results carry over to the dense semantics. Using variable-dimension DBMs
Group, Centre for Population Health Sciences, University of Edinburgh,An international, multidisciplinary workshop, where participa(StaRI): a systematic review and e-Delphi
"... Developing standards for reporting implementation studies of complex interventions (StaRI): a systematic review and e-Delphi Pinnock et al. Implementation ..."
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Developing standards for reporting implementation studies of complex interventions (StaRI): a systematic review and e-Delphi Pinnock et al. Implementation
Efficient Self-Timed Interfaces for Crossing Clock Domains
- In Proceedings. 9th International Symposium on Asynchronous Circuits and Systems
, 2003
"... With increasing integration densities, large chip designs are commonly partitioned into multiple clock domains. While the computation within each individual domain may be synchronous, the interfaces between these domains often use asynchronous methods. One such approach is the STARI technique[12, 13 ..."
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Cited by 33 (2 self)
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, 13] where a self-timed FIFO compensates for clock-skew between the sender and receiver. We present implementations of STARI where the FIFO consists of a single, handshaking stage. We start with the simplest case where the sender and receiver operate at exactly the same frequency with an unknown skew
Best Paper Award at 9th International Symposium on Asynchronous Circuits and Systems(May 2003) Efficient Self-Timed Interfaces for Crossing Clock Domains
"... With increasing integration densities, large chip designs are commonly partitioned into multiple clock domains. While the computation within each individual domain may be synchronous, the interfaces between these domains often use asynchronous methods. One such approach is the STARI technique[12, 13 ..."
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, 13] where a self-timed FIFO compensates for clock-skew between the sender and receiver. We present implementations of STARI where the FIFO consists of a single, handshaking stage. We start with the simplest case where the sender and receiver operate at exactly the same frequency with an unknown skew
Efficient Self-Timed Interfaces for Crossing Clock Domains
"... With increasing integration densities, large chip designs are commonly partitioned into multiple clock domains. While the computation within each individual domain may be synchronous, the interfaces between these domains often use asynchronous methods. One such approach is the STARI technique[12, 13 ..."
Abstract
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, 13] where a self-timed FIFO compensates for clock-skew between the sender and receiver. We present implementations of STARI where the FIFO consists of a single, handshaking stage. We start with the simplest case where the sender and receiver operate at exactly the same frequency with an unknown skew
Universal design and museum visits
"... Abstract This work, based on study cases of museum accessibility policy, aims to describe and to analyze the conception, implementation and the use by visitors of visits proposed by several French museums in Paris (Musée du Quai Branly, Cité de la musique, Louvre museum, … ). The study cases are sp ..."
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Abstract This work, based on study cases of museum accessibility policy, aims to describe and to analyze the conception, implementation and the use by visitors of visits proposed by several French museums in Paris (Musée du Quai Branly, Cité de la musique, Louvre museum, … ). The study cases
Machine Vision System for Assessment of Firing Process Parameters in Rotary Kiln
"... Abstract: Article describes developed hardware-software complex of machine vision system for assessment of firing process parameters in rotary cement kilns. Authors developed method of firing process image recognition, allowing automatically real-time assessment of the firing process in three parame ..."
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parameters: dust, state of the material and state of the torch.Its program implementation was performed.Authors made the selection of the number of hidden layer neurons of the network trained by extreme learning machine (ELM)provided the maximum average parameters classification accuracy. Advantage of ELM
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