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Modular Verification of SRT Division
, 1996
"... . We describe a formal specification and verification in PVS for the general theory of SRT division, and for the hardware design of a specific implementation. The specification demonstrates how attributes of the PVS language (in particular, predicate subtypes) allow the general theory to be deve ..."
Abstract

Cited by 12 (1 self)
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. We describe a formal specification and verification in PVS for the general theory of SRT division, and for the hardware design of a specific implementation. The specification demonstrates how attributes of the PVS language (in particular, predicate subtypes) allow the general theory
Modular Verification of SRT Division
, 1996
"... . We describe a formal specification and mechanized verification in PVS of the general theory of SRT division along with a specific hardware realization of the algorithm. The specification demonstrates how attributes of the PVS language (in particular, predicate subtypes) allow the general theory to ..."
Abstract

Cited by 17 (1 self)
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. We describe a formal specification and mechanized verification in PVS of the general theory of SRT division along with a specific hardware realization of the algorithm. The specification demonstrates how attributes of the PVS language (in particular, predicate subtypes) allow the general theory
Digit Selection for SRT Division
"... Abstract — The quotient digit selection in the SRT division algorithm is based on a few most significant bits of the remainder and divisor, where the remainder is usually represented in a redundant representation. The number of leading bits needed depends on the quotient radix and digit set, and is ..."
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Abstract — The quotient digit selection in the SRT division algorithm is based on a few most significant bits of the remainder and divisor, where the remainder is usually represented in a redundant representation. The number of leading bits needed depends on the quotient radix and digit set
SRT Division Algorithms As Dynamical Systems
, 2003
"... SRT division, as it was discovered in the late 1950s represented an important improvement in the speed of division algorithms for computers at the time. A variant of SRT division is still commonly implemented in computers today. Although some bounds on the performance of the original SRT division me ..."
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SRT division, as it was discovered in the late 1950s represented an important improvement in the speed of division algorithms for computers at the time. A variant of SRT division is still commonly implemented in computers today. Although some bounds on the performance of the original SRT division
SRT Division Architectures and Implementations
 IN PROC. 13TH IEEE SYMP. COMPUTER ARITHMETIC
, 1997
"... SRT dividers are common in modern floating point units. Higher division performance is achieved by retiring more quotient bits in each cycle. Previous research has shown that realistic stages are limited to radix2 and radix4. Higher radix dividers are therefore formed by a combination of lowradix ..."
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Cited by 12 (2 self)
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SRT dividers are common in modern floating point units. Higher division performance is achieved by retiring more quotient bits in each cycle. Previous research has shown that realistic stages are limited to radix2 and radix4. Higher radix dividers are therefore formed by a combination of low
SRT Division: Architectures, Models, and Implementations
"... SRT dividers are common in modern floating point units. Higher division performance is achieved by retiring more quotient bits in each cycle. Previous research has shown that realistic stages are limited to radix2 and radix4. Higher radix dividers are therefore formed by a combination of lowradix ..."
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SRT dividers are common in modern floating point units. Higher division performance is achieved by retiring more quotient bits in each cycle. Previous research has shown that realistic stages are limited to radix2 and radix4. Higher radix dividers are therefore formed by a combination of low
Mechanizing Verification of Arithmetic Circuits: SRT Division
 In Proc. 17th FSTTCS, volume 1346 of LNCS
, 1997
"... . The use of a rewritebased theorem prover for verifying properties of arithmetic circuits is discussed. A prover such as Rewrite Rule Laboratory (RRL) can be used effectively for establishing numbertheoretic properties of adders, multipliers and dividers. Since verification of adders and multi ..."
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Cited by 7 (1 self)
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and multipliers has been discussed elsewhere in earlier papers, the focus in this paper is on a divider circuit. An SRT division circuit similar to the one used in the Intel Pentium processor is mechanically verified using RRL. The numbertheoretic correctness of the division circuit is established from its
Digit Selection for SRT Division and Square Root
 IEEE Trans. Computers
, 2005
"... Abstract—The quotient digit selection in the SRT division algorithm is based on a few most significant bits of the remainder and divisor, where the remainder is usually represented in a redundant representation. The number of leading bits needed depends on the quotient radix and digit set, and is us ..."
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Cited by 4 (3 self)
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Abstract—The quotient digit selection in the SRT division algorithm is based on a few most significant bits of the remainder and divisor, where the remainder is usually represented in a redundant representation. The number of leading bits needed depends on the quotient radix and digit set
Alternative Implementations of SRT Division and Square Root Algorithms
"... Contents 1 Introduction 1 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Number Representations 3 2.1 Radix Representations . . . . . . . . . . . . . . . . . . ..."
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Cited by 3 (0 self)
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Contents 1 Introduction 1 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Number Representations 3 2.1 Radix Representations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Digit Sets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 RadixDigit Set Combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3.1 Redundancy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3.2 2's Complement Representation . . . . . . . . . . . . . . . . . . . . . . 5 2.3.3 SignMagnitude Representation . . . . . . . . . . . . . . . . . . . . . . 6 2.4 Radix Conversions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.5 Digit Set Conversions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.5.1 BorrowSave to SignDigit
A Radix16 SRT Division Unit with Speculation of the Quotient Digits
, 1999
"... The speed of a divider based on a digitrecurrence algorithm depends mainly on the latency of the quotient digit generation function. In this paper we present an analytical approach that extends the theory developed for standard SRT division and permits to implement division schemes where a simpler ..."
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The speed of a divider based on a digitrecurrence algorithm depends mainly on the latency of the quotient digit generation function. In this paper we present an analytical approach that extends the theory developed for standard SRT division and permits to implement division schemes where a simpler
Results 1  10
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