language tools that optimize router configurations and ensure they satisfy simple invariants. Due to Click’s architecture and language, Click router configurations are modular and easy to extend. A standards-compliant Click IP router has sixteen elements on its forwarding path. We present extensions

Abstract We present Tor, a circuit-based low-latency anonymous communication service. This second-generation Onion Routing system addresses limitations in the original design by adding perfect forward secrecy, congestion control, directory servers, integrity checking, configurable exit policies

This paper introduces McPAT, an integrated power, area, and timing modeling framework that supports comprehensive design space exploration for multicore and manycore processor configurations ranging from 90nm to 22nm and beyond. At the microarchitectural level, McPAT includes models

Dynamically Reconfigurable Processor (DRP) developed by NEC Electronics is a coarse grain reconfigurable processor that selects a datapath called a context from the on-chip repository of sixteen circuit configurations at runtime. The time-multiplexed execution based on the multicontext

. This paper makes a detailed case-study of the first such application of evolution directly to the configuration of a Field Programmable Gate Array (FPGA). Evolution is allowed to explore beyond the scope of conventional design methods, resulting in a highly efficient circuit with a richer structure

. In this paper, we show the feasibility of this approach in terms of hardware cost and speed and how it compares with software-based techniques. Index Terms—ATPG, combinational circuits, concurrency, configurable computing. I.

and a configuration file describing the participating parties. The system compiles the function into a description as a Boolean circuit, and perform a distributed evaluation of the circuit while revealing nothing else. FairplayMP supplements the Fairplay system [16], which supported secure computation

The circuit ideal, IC A, of a configuration A = {a1,...,an} ⊂ Z d is the ideal generated by the binomials xc+ − xc − ∈ k[x1,..., xn] as c = c + −c − ∈ Zn varies over the circuits of A. This ideal is contained in the toric ideal, IA, of A which has numerous applications and is nontrivial

bandwidth of WDM networks. Photonic packet switching offers high speed, data rate and format transparency, and configurability, which are some of the important characteristics needed in the future networks supporting different forms of data. In this paper we present some of the critical issues involved

to the way object-oriented languages manage memory: circuits are treated as distinct objects and a circuit is configured onto a configurable computing machine (CCM) by invoking its constructor, effectively "constructing" an instance of the circuit onto the reconfigurable platform just as object