Results 1 - 10 of 1,053

Delay Management for Programmable Video Signal Processors

by Smeets Aarts Essink, M. L. G. Smeets, E. H. L. Aarts, G. Essink, E. A. Kock , 1997
"... We consider the problem of memory allocation for intermediate data in the mapping of video algorithms onto programmable video signal processors. The corresponding delay management problem is proved to be NP-hard. We present a solution strategy that decomposes the delay management problem into a dela ..."
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We consider the problem of memory allocation for intermediate data in the mapping of video algorithms onto programmable video signal processors. The corresponding delay management problem is proved to be NP-hard. We present a solution strategy that decomposes the delay management problem into a

Design Methodology for Programmable Video Signal Processors

by Andrew Wolfe, Wayne Wolf, Santanu Dutta, Jason Fritts - SPIE Photonics West, Multimedia Hardware Architectures '97 , 1997
"... This paper presents a design methodology for a high-performance, programmable video signal processor (VSP). The proposed design methodology explores both technology-driven hardware tradeoffs and application-driven architectural tradeoffs for optimizing cost and performance within a class of processo ..."
Abstract - Cited by 1 (1 self) - Add to MetaCart
This paper presents a design methodology for a high-performance, programmable video signal processor (VSP). The proposed design methodology explores both technology-driven hardware tradeoffs and application-driven architectural tradeoffs for optimizing cost and performance within a class

Recursive Bipartitioning of Signal Flow Graphs for Programmable Video Signal Processors

by E.H.L. Aarts, G. Essink, E.A. de Kock - In Proc. ED&TC96 , 1996
"... We consider the problem of partitioning video algorithms over an arbitrary network of highperformance video signal processors. The partitioning problem under consideration is very hard due to the many constraints that need to be satis#ed. We present a solution strategy based on a recursive bipartiti ..."
Abstract - Cited by 4 (1 self) - Add to MetaCart
search, realtime video signal processing. 1 Introduction At Philips Research, programmable video signal processors #VSPs# have been developed for #exible and rapid evaluation of video algorithms in real time. Programming of VSPs is done by mapping a speci#cation, given by a signal #ow graph #SFG#, onto

Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing

by Edward Ashford Lee, David G. Messerschmitt - IEEE TRANSACTIONS ON COMPUTERS , 1987
"... Large grain data flow (LGDF) programming is natural and convenient for describing digital signal processing (DSP) systems, but its runtime overhead is costly in real time or cost-sensitive applications. In some situations, designers are not willing to squander computing resources for the sake of pro ..."
Abstract - Cited by 598 (37 self) - Add to MetaCart
of program-mer convenience. This is particularly true when the target machine is a programmable DSP chip. However, the runtime overhead inherent in most LGDF implementations is not required for most signal processing systems because such systems are mostly synchronous (in the DSP sense). Synchronous data

Synchronous data flow

by Edward A. Lee, et al. , 1987
"... Data flow is a natural paradigm for describing DSP applications for concurrent implementation on parallel hardware. Data flow programs for signal processing are directed graphs where each node represents a function and each arc represents a signal path. Synchronous data flow (SDF) is a special case ..."
Abstract - Cited by 622 (45 self) - Add to MetaCart
of data flow (either atomic or large grain) in which the number of data samples produced or consumed by each node on each invocation is specified a priori. Nodes can be scheduled statically (at compile time) onto single or parallel programmable processors so the run-time overhead usually associated

A Memory Efficient, Programmable Multi-Processor Architecture For Real-Time Motion Estimation Type Algorithms

by E. De Greef, F. CATTHOOR, H. DE MAN , 1995
"... . In this paper, an architectural template is presented, which is able to execute the full search motion estimation algorithm or other similar video or image processing algorithms in real time. The architecture is based on a set of programmable video signal processors (VSP's). It is also possib ..."
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. In this paper, an architectural template is presented, which is able to execute the full search motion estimation algorithm or other similar video or image processing algorithms in real time. The architecture is based on a set of programmable video signal processors (VSP's). It is also

Memory Organization for Video Algorithms on Programmable Signal Processors

by Eddy De Greef, Francky Catthoor, Hugo De Man - Proc. IEEE Int. Conf. on Computer Design, Austin TX , 1995
"... In this paper, several DSP system design principles are presented which are valid for a large class of memory-intensive algorithms. Our main focus lies on the optimization of the memory and I/O, since these are dominant cost factors in the domain of video and imaging applications. This has resulted ..."
Abstract - Cited by 6 (1 self) - Add to MetaCart
In this paper, several DSP system design principles are presented which are valid for a large class of memory-intensive algorithms. Our main focus lies on the optimization of the memory and I/O, since these are dominant cost factors in the domain of video and imaging applications. This has resulted

Datapath Design for a VLIW Video Signal Processor

by Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S. T. Fern - in HPCA , 1997
"... This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellent high-level language programmability, but require careful attention to VLSI and compiler design. Flexible, highbandwidth ..."
Abstract - Cited by 9 (4 self) - Add to MetaCart
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellent high-level language programmability, but require careful attention to VLSI and compiler design. Flexible

Data-path synthesis of VLIW video signal processors

by Zhao Wu, Wayne Wolf - in Proceedings of the 11th International Symposium on System Synthesis
"... This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programmability, VSPs are important for their roles in digital video applications, which are omnipresent in today’s world. Among ..."
Abstract - Cited by 2 (0 self) - Add to MetaCart
This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programmability, VSPs are important for their roles in digital video applications, which are omnipresent in today’s world. Among

Datapath Design for a VLIW Video Signal Processor

by Andrew Wolfe Jason, Jason Fritts, Santanu Dutta, Edil S. T. Fern - in HPCA , 1997
"... This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellent high-level language programmability, but require careful attention to VLSI and compiler design. Flexible, highbandwidth ..."
Abstract - Add to MetaCart
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellent high-level language programmability, but require careful attention to VLSI and compiler design. Flexible
Results 1 - 10 of 1,053