Results 1 - 10 of 133

Mapping the data flow model of computation into an enhanced von Neumann processor

by Peter M. Maurer - In Proceedings of the International Conference on Parallel Processing , 1988
"... Abstract-- The SAM architecture is an enhanced von Neumann processor that contains inexpensive features for supporting data flow style of parallelism. The architecture gets is name from the basic instructions for supporting parallelism, Split and Merge. It is shown that these instructions can be use ..."
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Abstract-- The SAM architecture is an enhanced von Neumann processor that contains inexpensive features for supporting data flow style of parallelism. The architecture gets is name from the basic instructions for supporting parallelism, Split and Merge. It is shown that these instructions can

Von Neumann Quantum Processors

by Alexander Yu. Vlasov , 2003
"... Most modern classical processors support so-called von Neumann architecture with program and data registers. In present work is revisited similar approach to models of quantum processors. Deterministic programmable quantum gate arrays are considered as an example. They are also called von Neumann qu ..."
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Most modern classical processors support so-called von Neumann architecture with program and data registers. In present work is revisited similar approach to models of quantum processors. Deterministic programmable quantum gate arrays are considered as an example. They are also called von Neumann

A finite-volume, incompressible Navier–Stokes model for studies of the ocean on parallel computers.

by John Marshall , Alistair Adcroft , Chris Hill , Lev Perelman , Curt Heisey - J. Geophys. Res., , 1997
"... Abstract. The numerical implementation of an ocean model based on the incompressible Navier Stokes equations which is designed for studies of the ocean circulation on horizontal scales less than the depth of the ocean right up to global scale is described. A "pressure correction" method i ..."
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is used which is solved as a Poisson equation for the pressure field with Neumann boundary conditions in a geometry as complicated as that of the ocean basins. A major objective of the study is to make this inversion, and hence nonhydrostatic ocean modeling, efficient on parallel computers. The pressure

Can dataflow subsume von Neumann computing

by Rishiyur S. Nikhil - In 16th Annual International Symposium on Computer Architecture , 1989
"... Abstract: We explore the question: “What can a von Neumann processor borrow from dataflow to make it more suitable for a multiprocessor? ” Start-ing with a simple, ‘%ISC-like ” instruction set, we show how to change the underlying processor orga-nization to make it multithreaded. Then, we extend it ..."
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Abstract: We explore the question: “What can a von Neumann processor borrow from dataflow to make it more suitable for a multiprocessor? ” Start-ing with a simple, ‘%ISC-like ” instruction set, we show how to change the underlying processor orga-nization to make it multithreaded. Then, we extend

Monsoon: an explicit token-store architecture

by Gregory M. Papadopoulos - In Proc. of the 17th Annual Int. Symp. on Comp. Arch , 1990
"... Dataflow architectures tolerate long unpredictable com-munication delays and support generation and coordi-nation of parallel activities directly in hardware, rather than assuming that program mapping will cause these issues to disappear. However, the proposed mecha-nisms are complex and introduce n ..."
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with storage local to a processor. Low-level storage management is performed by the compiler in assigning nodes to slots in an activation frame, rather than dy-namically in hardware. The processor is simple, highly pipelined, and quite general. It may be viewed as a generalization of a fairly primitive von

Processors as Organisms

by England U. K, Robert Davidge Robertd, Robert Davidge , 1992
"... The von Neumann architecture has long been the heart of all computers. Its apparently rigid structure has led to it being accused as the antithesis of the new approaches to programming led by Artificial Life. However, slight modifications of this structure allow us to produce a processor which be ..."
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The von Neumann architecture has long been the heart of all computers. Its apparently rigid structure has led to it being accused as the antithesis of the new approaches to programming led by Artificial Life. However, slight modifications of this structure allow us to produce a processor which

Microprocessor Design Verification

by Warren Hunt, Copyright Warren, A. Hunt - Journal of Automated Reasoning , 1989
"... The verification of a microprocessor design has been accomplished using a mechanical theorem prover. This microprocessor, the FM8502, is a 32-bit general purpose, von Neumann processor whose design-level (gate-level) specification has been verified with respect to its instruction-level specification ..."
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The verification of a microprocessor design has been accomplished using a mechanical theorem prover. This microprocessor, the FM8502, is a 32-bit general purpose, von Neumann processor whose design-level (gate-level) specification has been verified with respect to its instruction

The von Neumann architecture is due for retirement

by Aleksander Budzynowski , Gernot Heiser
"... Abstract The processor industry has reached the point where sequential improvements have plateaued and we are being flooded with parallel hardware we don't know how to utilise. An efficient, general-purpose and easy-touse parallel model is urgently needed to replace the von Neumann model. We i ..."
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Abstract The processor industry has reached the point where sequential improvements have plateaued and we are being flooded with parallel hardware we don't know how to utilise. An efficient, general-purpose and easy-touse parallel model is urgently needed to replace the von Neumann model. We

Threads on the Cheap: Multithreaded Execution in a WaveCache Processor

by Steven Swanson, Andrew Schwerin, Andrew Petersen, Mark Oskin, Susan Eggers
"... Abstract: Executing multiple threads on a single processor will play a key role the future scaling of computer performance, and while many new architectures propose novel uses for threads, few address the complexity required to support multiple threads in a single processor core. This paper describe ..."
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describes extensions to WaveScalar, a recently proposed dataflow instruction set, and the WaveCache, a WaveScalar processor, that allow multiple threads to execute simultaneously. The original WaveCache is significantly less complex than a modern out-of-order von Neumann processor, and the modifications

Anaconda - A Real-Time Control-Flow/Data-Flow Hybrid Processor

by Simon W. Moore , 1993
"... Typically real-time applications are written in a multi-threaded language and are executed on single threaded control-flow (von Neumann) processors. A software scheduler is used to switch between the application's multiple threads, thereby simulating a multi-threaded processor. Unfortunately ..."
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Typically real-time applications are written in a multi-threaded language and are executed on single threaded control-flow (von Neumann) processors. A software scheduler is used to switch between the application's multiple threads, thereby simulating a multi-threaded processor
Results 1 - 10 of 133