### Table 1: Rank and shape inference for the multiplication operator.

1994

"... In PAGE 12: ... Hence, it is also important to provide the ability of recognizing scalars and vectors. Rank and shape information for many operations can be obtained with the use of tables, such as the one shown in Table1 , that contains the rank and shape information for the multiplication operator.... ..."

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### Table 1: Rank and shape inference for the multiplication operator.

"... In PAGE 4: ...equire both operands to have the same shape (e.g., +, -, and logical operators) as a shape conformable operator. The conformability analysis uses tables suchas Table1 for the rank and shape inference for the multiplication operator (a single-dimension conformable opera- tor) and Table 2 for the shape inference of a shape conformable operator. In these tables the shape information is indicated with the letters (m, n, p, and q) that represent the exact values for the number of rows or the number of columns.... ..."

### Table 2: Complex Multiplication Operation Steps

1998

"... In PAGE 5: ... We use the \multiplier2 quot; block with two adders and reg- isters to complete a complex multiply. Table2 gives the step by step procedure of the complex multiply opera- tion corresponding to Figure 2 parts a to d. Operation 1 Receive RefXg from FFT-4 Figure 2 (a) 2 Multiply RefXg by RefYg and ImfYg creating the two partial products XrYr and j XrYi Figure 2 (b) 3 Receive ImfXg from FFT-4 Figure 2 (b) 4 Multiply ImfXg by RefYg and ImfYg creating the two partial products j XiYr and XiYi Figure 2 (c) 5 Subtract XiYi from XrYr to produce RefZg and add j XrYi and j XiYr to produce ImfZg Figure 2 (d) Table 2: Complex Multiplication Operation Steps... In PAGE 5: ...Figure 2: Complex Multiplier Data Path Operation As shown in Figure 2, each output of the multiplier2 block connects to one A and B input of an adder and subtracter. Each A input contains a latch to store the integer product of the rst two multiplications as de- scribed in step 2 of Table2 . The second multiplication result can be passed directly to the adder/subtracter and used with the latched value to produce the com- plex valued result.... In PAGE 5: ... Since the FFT-4 will likely produce its outputs faster than the multiplier can use them, ImfXg will probably ar- rive early. Despite this, ImfXg will not be used until after it is latched in step 3 of Table2 . The second mul- tiplication pair has completed in Figure 2(c) and held statically on the data lines.... ..."

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### Table 1. Sections of the Reconflgurable Multiple Operation Array

2005

"... In PAGE 4: ... Additionally, section 9 as part of the multiplier array, is used to add the last partial products; and section 10 receives the W(i) addend for MAC processing. Table1 summarizes the terms received by I1 in each one of the main sections through the 8 to 1 multiplexor. From the table is evident that we process numbers of two complement repre- sentation with sign extension, and signed magnitude numbers are processed like positive numbers, making the sign bit zero and updating the result with the XOR of multiplicand and multiplier signs.... ..."

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### TABLE I (a) SEMANTICS FOR ADDITIVE OPERATORS. (b) SEMANTICS OF MULTIPLICATIVE OPERATORS

### Table 1: Estimated clock cycles for inversion and the ratio to the multiplication operation.

2002

"... In PAGE 3: ... Based on these experimental values we calcu- lated the estimated execution time in terms of number of clock cycles for inversion operation using word length 32. We summarized the re- sults in Table1 . Table 1 also includes the clock cycle count estimates for the modular multipli- cation operation for the same precisions, which is assumed to be performed using unified and scalar Montgomery modular multiplication unit proposed in [11] with 7 pipeline stages and 32-bit word size.... In PAGE 3: ... Similarly, our calculations show that this ratio is about 9 for prime field GF (p). As can be observed in Table1 the ratio stays lower than 7 for the precisions of interest to the elliptic curve cryptography. Table 1: Estimated clock cycles for inversion and the ratio to the multiplication operation.... ..."

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### Table 2. Multiple Operation Array Unit and related units - time delay

2005

"... In PAGE 8: ... Furthermore, previous presented units like the Universal SAD-Multiplier array (U-SAD-M) [2] for integer numbers and Baugh and Wooley (B amp;W) signed multiplier [1] were synthesized with the same tool in order to have more comparison parameters with our new proposal. Table2 summarizes the performance in terms of time delay of those structures. The additional logic introduced into the core array reduces the performance of the functionalities, as can be seen in table 2.... ..."

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### Table 3. Multiple Operation Array Unit and related units - hardware Use

2005

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