"... In PAGE 5: ... 5.1 Memory Reference Statistics Table1 presents dynamic memory reference statistics for the benchmark programs. For each program the up- per line gives #0Cgures for a complete execution, the lower for the sampled trace.... ..."

"... In PAGE 15: ... The fraction is surprisingly large, r even for large programs. Table3 shows the percentage of the removable executed loads and stores that we emoved when 52 registers were used. (This is not a fraction of all loads and stores executed, but only of those that we can remove by keeping some scalar variable in a register instead of memory.... ..."

"... In PAGE 22: ... We show three sets of results. First, in Table3 , we show the number of vector, scalar and total memory accesses for the baseline and the full system. Our approach eliminates from 38% to 69% of the vector loads and stores in the four kernels, and over 85% in SWIM and TOMCATV.... ..."

"... In PAGE 15: ... The fraction is surprisingly large, r even for large programs. Table3 shows the percentage of the removable executed loads and stores that we emoved when 52 registers were used. (This is not a fraction of all loads and stores executed, but only of those that we can remove by keeping some scalar variable in a register instead of memory.... ..."

"... In PAGE 2: ... Consequently, while an SMT processor needs an allocator with good concurrency, using an SMP allocator that reduces inter- processor sharing may be unnecessary or even harmful on an SMT. To address the various needs discussed above, researchers have designed a wide range of memory allocators; Table1 shows those that we consider in this work. In the simplest case, Serial, only one thread may access the memory allocator at a time.... ..."

"... In PAGE 3: ...1 Programs Our illustrative language (following [19, 5]) combines an Algol-like language for control ow and functions, Lisp-like memory access, and explicit destructive assignment statements. The atomic statements of this language are shown in Table1 . Memory access paths are represented by hAccessi.... In PAGE 7: ...3 A Formal De nition of the Instrumentation Formally, we de ne the instrumentation as follows: De nition 3. Let P be a program in the form de ned in Table1 . Let s1; s2; : : : ; sn be the statement labels in P.... ..."

"... In PAGE 12: ...1 Programs Our illustrative language #28following #5B19, 5#5D#29 combines an Algol-like language for control #0Dow and functions, Lisp-like memory access, and explicit destructive assignment statements. The atomic statements of this language are shown in Table1 . Memory access paths are represented by hAccessi.... In PAGE 16: ...3 AFormal De#0Cnition of the Instrumentation Formally,we de#0Cne the instrumentation as follows: De#0Cnition 3. Let P beaprogram in the form de#0Cnedin Table1 . Let s 1 ;s 2 ;:::;s n be the statement labels in P.... In PAGE 42: ...1 Benchmark Characterization The SPEC95 benchmarks consist of eighteen programs, nine written in FORTRAN and nine written in C. Table1 lists summary data for each benchmark: the number of paths ex- ecuted #28#23Paths#29; the total #0Dow for the benchmark #28that is, the sum of the frequencies of all paths executed, in millions#7B Total Flow#29; the number of paths whose frequency is greater than 0.125#25 of the total #0Dow, and the percentage of total procedure main#28M : map; cuto#0B : integer#29 var Paths := #1E procedure enumerate#28v : vertex; p : path; f;#01:integer#29 var #01 0 := #01 used := #1E begin if v = exit then Paths := Paths #5Bf#28p; f#29g else while #01 0 #3E 0 do let e 2 out#28v#29 and #28g 7! #01 g #29 2 M#5Be#5D s.... In PAGE 43: ...6 20 84.7 Table1 : Summary of the SPEC95 benchmarks. The FORTRAN benchmarks are listed on top while the C benchmarks are listed below.... In PAGE 45: ...125#25 and 1.0#25, the same values used in Table1 . Figure 13 presents the results for the ratios R D q #28De#0Cnite#29, R P q #28Potential#29, and R G q #28Greedy#29.... ..."