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Table V. Deterministic sub1, N = 5000

in Efficient Prolog Programming
by Timo Knuutila

TABLE V QUORUM JOIN DELAY THE TWO-LAYER MODEL OF FIG. 8 WITH DETERMINISTIC CALLS.

in Deriving Distribution of Thread Service Time in Layered Queueing Networks
by unknown authors

Table 3: Invertible non-deterministic #0Dowchart symbols with their direct and reverse

in Linear Time Simulation of Invertible Non-Deterministic Stack Algorithms
by Nils Andersen

Table 3: The di erence of the average ll centre-of-mass energy computed with the phenomenological model and with the deterministic model for the o -peak datasets

in European Organization For Particle Physics
by Cern--Ep Cern--Sl March
"... In PAGE 24: ...rrors: the various models give di erences ranging from 0.9 to 1.2 MeV. In particular the error due to the approximate assumption that temperature and parasitic-current contributions to the eld drift are independent is monitored by the comparison with the deterministic model (see Table3 ). From these sources, a contribution equivalent to an error on the width of 1 MeV was taken.... ..."

Table 2: Delay constrained min-cost statistical buffering vs. deterministic buffering on a net for D2M delay model Nets DL-NOMBI DL-WSTBI DL-PK-FSBI-V2

in unknown title
by unknown authors 2007
Cited by 1

Table 1: Delay constrained min-cost statistical buffering vs. deterministic buffering on a net for Elmore delay model Nets DL-NOMBI DL-WSTBI DL-FSBI DL-PK-FSBI DL-PK-FSBI-V2

in unknown title
by unknown authors 2007
"... In PAGE 5: ...13%. Table1 shows the comparison results. Note that SBI cannot finish any of these testcases in one day, so DL-FSBI is much more efficient than SBI.... ..."
Cited by 1

TABLE II ROADMAP SHOWING MINIMUM METRICS OR MOST SUITABLE TOPOLOGIES FOR 64-NODE NETWORKS AT 90nm AND 50nm TECHNOLOGIES. THE 4-TUPLE UNDER EACH TOPOLOGY DENOTES THE ROUTING TYPE WHERE A = ADAPTIVE AND D = DETERMINISTIC, THE FLOW CONTROL TYPE WHERE W = WORMHOLE AND V = VIRTUAL CUT-THOUGH , THE BUFFER SIZE PER VIRTUAL CHANNEL (VC) IN TERMS OF 64-BIT FLITS AND THE VC COUNT PER PHYSICAL CHANNEL. EC DENOTES EXPRESS CUBE TOPOLOGIES, WHERE e DENOTES THE LINK INTERVAL.

in ‡ Freescale Semiconductor
by Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin Li, Li-shiuan Peh

Table 1 shows the convergence of the relative error in an adaptive iteration. It can be seen, that from about 10,000 grid points on, the ratio between error and estimate remains constant. The last column displays the grid e ciency, the product of the number of grid cells and the relative error. This number is about constant on all grids, displaying second order convergence on adaptive meshes. A typical computational grid is shown on the left Figure 3. Although the primal problem is symmetric, the weighted residual estimator induces a stronger grid re nement in the direction of interest. For comparison, a typical grid for a

in A Robust Finite Element Discretization for Radiative Transfer Problems with Scattering
by Guido Kanschat 1998
"... In PAGE 8: ...9e-2 7.70 231 Table1 : Comparison of relative errors and estimates From these numerical results, we conclude, that the norm k:kW is appropriate indeed to estimate stability for the radiative transfer equation. Furthermore, these results were obtained with a xed angular discretization of an odd number of intervals on S2, so no symmetry condition applies to the method.... ..."
Cited by 1

Table 1. Deterministic Propagation

in Importance sampling on relational Bayesian networks
by Manfred Jaeger 2006
Cited by 2

Table 2: Embedded deterministic patterns

in Application of Deterministic Logic BIST on Industrial Circuits
by Gundolf Kiefer Harald, Harald Vranken 2000
"... In PAGE 4: ...3 Deterministic test patterns The efficiency of the deterministic BIST scheme strongly depends on the number of specified bits in deter- ministic patterns. Table2 provides figures on the determi- nistic patterns for the industrial circuits: the number of embedded deterministic patterns (#det. pats), the number of pseudo-primary inputs (#PPI), and the maximum num- ber (#spec.... In PAGE 4: ...Table 2: Embedded deterministic patterns Table2 indicates that the number of specified bits is quite small and does not generally increase with the size of the circuit or the number of pseudo-primary inputs. A similar observation has been reported with the ISCAS apos;85 and ISCAS apos;89 benchmark circuits in [HRTW95].... ..."
Cited by 9
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