Results 1 - 10 of 1,264

Customized instruction-sets for embedded processors

by Joseph A. Fisher - In Proceedings of the Design Automation Conference , 1999
"... It is generally believed that there will be little more variety in CPU architectures, and thus the design of Instruction-set Architectures (ISAs) will have no role in the future of embedded CPU design. Nonetheless, it is argued in this paper that architectural variety will soon again become an impor ..."
Abstract - Cited by 15 (0 self) - Add to MetaCart
It is generally believed that there will be little more variety in CPU architectures, and thus the design of Instruction-set Architectures (ISAs) will have no role in the future of embedded CPU design. Nonetheless, it is argued in this paper that architectural variety will soon again become

Custom Instructions with Multiple Exits: Generation and Execution

by Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki Murakami, Maziar Goudarzi
"... Abstract In this paper, we propose an adaptive extensible processor in which custom instructions are generated and added after chip-fabrication. A reconfigurable functional unit is utilized to support this feature. The proposed reconfigurable functional unit is based on a matrix of functional units ..."
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Abstract In this paper, we propose an adaptive extensible processor in which custom instructions are generated and added after chip-fabrication. A reconfigurable functional unit is utilized to support this feature. The proposed reconfigurable functional unit is based on a matrix of functional units

Custom-Instruction Synthesis for Extensible-Processor Platforms

by Fei Sun, Student Member, Anand Raghunathan, Srivaths Ravi, Senior Member, Niraj K. Jha - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2004
"... Efficiency and flexibility are critical, but often conflicting, design goals in embedded system design. The recent emergence of extensible processors promises a favorable tradeoff between efficiency and flexibility, while keeping design turnaround times short. Current extensible processor design flo ..."
Abstract - Cited by 27 (0 self) - Add to MetaCart
flows automate several tedious tasks, but typically require designers to manually select the parts of the program that are to be implemented as custom instructions. In this work, we describe an automatic methodology to select custom instructions to augment an extensible processor, in order to maximize

Scalable Custom Instructions Identification for Instruction-Set Extensible Processors

by Pan Yu - In CASES , 2004
"... Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automatically select the optimal set of custom instructions. Therefore, heuristic techniques are often employed to quickly search the ..."
Abstract - Cited by 66 (8 self) - Add to MetaCart
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automatically select the optimal set of custom instructions. Therefore, heuristic techniques are often employed to quickly search

Efficient Custom Instructions Generation for System-Level Design

by unknown authors
"... Abstract—Customizable embedded processors, where the processor core can be enhanced with application-specific instructions, can provide high performance similar to custom design circuits with the flexibility of software solutions. The acceptability of customizable processors, however, critically hin ..."
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Abstract—Customizable embedded processors, where the processor core can be enhanced with application-specific instructions, can provide high performance similar to custom design circuits with the flexibility of software solutions. The acceptability of customizable processors, however, critically

Compact Code Generation through Custom Instruction Sets

by Maarten Wegdam , 1996
"... This report describes the use of a custom instruction set to optimize for code size. A compiler is described that accepts a C program as input and generates a custom instruction set for that program that minimizes the resulting code size when compiling with this instruction set. The method uses a gr ..."
Abstract - Cited by 2 (0 self) - Add to MetaCart
This report describes the use of a custom instruction set to optimize for code size. A compiler is described that accepts a C program as input and generates a custom instruction set for that program that minimizes the resulting code size when compiling with this instruction set. The method uses a

Efficient Custom Instruction Identification with Exact Enumeration

by Pan Yu, Tulika Mitra , 2007
"... Extensible processors allow addition of application-specific custom instructions to the core instruc-tion set architecture. These custom instructions are selected through an analysis of the program’s dataflow graphs. The characteristics of certain applications and the modern compiler optimization te ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
Extensible processors allow addition of application-specific custom instructions to the core instruc-tion set architecture. These custom instructions are selected through an analysis of the program’s dataflow graphs. The characteristics of certain applications and the modern compiler optimization

DISJOINT PATTERN ENUMERATION FOR CUSTOM INSTRUCTIONS IDENTIFICATION

by unknown authors
"... Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analysis of the program’s dataflow graphs. The characteristics of certain applications and the modern compiler optimization tec ..."
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Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analysis of the program’s dataflow graphs. The characteristics of certain applications and the modern compiler optimization

Satisfying real-time constraints with custom instructions

by Pan Yu - In ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS , 2005
"... Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application of instruction-set extensions to meet timing constraints in real-time embedded systems. In order to satisfy real-time con ..."
Abstract - Cited by 9 (2 self) - Add to MetaCart
Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application of instruction-set extensions to meet timing constraints in real-time embedded systems. In order to satisfy real

Architecture-Aware Custom Instruction Generation for Reconfigurable

by Alok Prakash, Siew-kei Lam, Amit Kumar Singh, Thambipillai Srikanthan (senior Member Ieee - Processors. International Symposium on Applied Reconfigurable Computing , 2010
"... Abstract. Instruction set extension is becoming extremely popular for meeting the tight design constraints in embedded systems. This mecha-nism is now widely supported by commercially available FPGA (Field-Programmable Gate Array) based reconfigurable processors. In this pa-per, we present a design ..."
Abstract - Cited by 2 (2 self) - Add to MetaCart
flow that automatically enumerates and selects custom instructions from an application DFG (Data-Flow Graph) in an architecture-aware manner. Unlike previously reported methods, the pro-posed enumeration approach identifies custom instruction patterns that can be mapped onto the target FPGA in a
Results 1 - 10 of 1,264