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1,218
A theory of timed automata
, 1999
"... Model checking is emerging as a practical tool for automated debugging of complex reactive systems such as embedded controllers and network protocols (see [23] for a survey). Traditional techniques for model checking do not admit an explicit modeling of time, and are thus, unsuitable for analysis of ..."
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Cited by 2651 (32 self)
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of realtime systems whose correctness depends on relative magnitudes of different delays. Consequently, timed automata [7] were introduced as a formal notation to model the behavior of realtime systems. Its definition provides a simple way to annotate statetransition graphs with timing constraints
Consensus in the presence of partial synchrony
 JOURNAL OF THE ACM
, 1988
"... The concept of partial synchrony in a distributed system is introduced. Partial synchrony lies between the cases of a synchronous system and an asynchronous system. In a synchronous system, there is a known fixed upper bound A on the time required for a message to be sent from one processor to ano ..."
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Cited by 513 (18 self)
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correctly in the partially synchronous system regardless of the actual values of the bounds A and (I,. In another version of partial synchrony, the bounds are known, but are only guaranteed to hold starting at some unknown time T, and protocols must be designed to work correctly regardless of when time
Razor: A lowpower pipeline based on circuitlevel timing speculation
 in Proc. IEEE/ACM Int. Symp. Microarchitect
, 2003
"... With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systemsonchip. One of the more effective and widely used methods for poweraware computing is dynamic voltage scaling (DVS). In order to obtain the ..."
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Cited by 288 (8 self)
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borrowing delayed clock. A metastabilitytolerant comparator then validates latch values sampled with the fast clock. In the event of a timing error, a modified pipeline mispeculation recovery mechanism restores correct program state. A prototype Razor pipeline was designed in 0.18 µm technology and was analyzed
What Good Are Digital Clocks?
, 1992
"... . Realtime systems operate in "real," continuous time and state changes may occur at any realnumbered time point. Yet many verification methods are based on the assumption that states are observed at integer time points only. What can we conclude if a realtime system has been shown ..."
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Cited by 141 (14 self)
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"correct" for integral observations? Integer time verification techniques suffice if the problem of whether all realnumbered behaviors of a system satisfy a property can be reduced to the question of whether the integral observations satisfy a (possibly modified) property. We show
Dynamic FaultTolerant Clock Synchronization
, 1996
"... This paper gives two simple efficient distributed algorithms: one for keeping clocks in a network synchronized and one for allowing new processors to join the network with their clocks synchronized. Assuming a fault tolerant authentication protocol, the algorithms tolerate both link and processor fa ..."
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Cited by 142 (9 self)
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an improvement over other clock synchronization algorithms such as [LM,WL], although, unlike them, it does require an authentication protocol to handle Byzantine faults. Our algorithm for allowing new processors to join requires that more than half the processors be correct, a requirement that is provably
Atomic Broadcast: From Simple Message Diffusion to Byzantine Agreement
 Information and Computation
, 1985
"... In distributed systems subject to random communication delays and component failures, atomic broadcast can be used to implement the abstraction of synchronous replicated storage, a distributed storage that displays the same contents at every correct processor as of any clock time. This paper present ..."
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Cited by 244 (15 self)
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In distributed systems subject to random communication delays and component failures, atomic broadcast can be used to implement the abstraction of synchronous replicated storage, a distributed storage that displays the same contents at every correct processor as of any clock time. This paper
Bayesian inference on phylogeny and its impact on evolutionary biology.
 Science
, 2001
"... 1 As a discipline, phylogenetics is becoming transformed by a flood of molecular data. These data allow broad questions to be asked about the history of life, but also present difficult statistical and computational problems. Bayesian inference of phylogeny brings a new perspective to a number of o ..."
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Cited by 235 (10 self)
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]). The posterior probability of a tree can be interpreted as the probability that the tree is correct. Inferences about the history of the group are then based on the posterior probability of trees. For example, the tree with the highest posterior probability might be chosen as the best estimate of phylogeny (1
An Optimal Internal Clock Synchronization Algorithm
, 1995
"... We propose an optimal convergence function for achieving faulttolerant, internal clock synchronization in the presence of arbitrary process and clock failures. The differential faulttolerant midpoint convergence function guarantees an optimal maximum correction, an optimal maximum drift rate, and ..."
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Cited by 24 (1 self)
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We propose an optimal convergence function for achieving faulttolerant, internal clock synchronization in the presence of arbitrary process and clock failures. The differential faulttolerant midpoint convergence function guarantees an optimal maximum correction, an optimal maximum drift rate
Understanding Protocols for Byzantine Clock Synchronization
, 1987
"... All published faulttolerant clock synchronization protocols are shown to result from refining a single paradigm. This allows the differera clock synchronization protocols to be compared and permits presemation of a single correctness analysis that holds for all. The paradigm is based on a reliab ..."
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Cited by 79 (0 self)
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All published faulttolerant clock synchronization protocols are shown to result from refining a single paradigm. This allows the differera clock synchronization protocols to be compared and permits presemation of a single correctness analysis that holds for all. The paradigm is based on a
CAR: Clock with Adaptive Replacement
 IN PROCEEDINGS OF THE USENIX CONFERENCE ON FILE AND STORAGE TECHNOLOGIES (FAST
, 2004
"... CLOCK is a classical cache replacement policy dating back to 1968 that was proposed as a lowcomplexity approximation to LRU. On every cache hit, the policy LRU needs to move the accessed item to the most recently used position, at which point, to ensure consistency and correctness, it serializes c ..."
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Cited by 62 (0 self)
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CLOCK is a classical cache replacement policy dating back to 1968 that was proposed as a lowcomplexity approximation to LRU. On every cache hit, the policy LRU needs to move the accessed item to the most recently used position, at which point, to ensure consistency and correctness, it serializes
Results 1  10
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