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COMBINATIONAL CIRCUITS

by Behrooz Parhami
"... Combinational (combinatorial) circuits realize Boolean functions and deal with digitized signals, usually denoted by 0s and 1s. The behavior of a combinational circuit is memoryless; that is, given a stimulus to the input of a combinational circuit, a response appears at the output after some propag ..."
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Combinational (combinatorial) circuits realize Boolean functions and deal with digitized signals, usually denoted by 0s and 1s. The behavior of a combinational circuit is memoryless; that is, given a stimulus to the input of a combinational circuit, a response appears at the output after some

Combinational Circuits

by Young-ho Seo, Jong-hyeon Kim, Yong-jin Jung, Dong-wook Kim, Sou Yamamoto, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Jong-heon Kim, Jong-hak Hwang, Seung-yong Park, Heung-soo Kim, Eunjung Oh, Dong-ik Lee, Ho-yong Choi, Chungbuk Nat'l Univ, Takahiro Ohnishi, Hiroyuki Yotsuyanagi, Masaki Hashizume, Takeomi Tamesada, Yukiko Mushiaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada , 2000
"... Univ.ofTokushima,Japan 3. Design and Implementation of the Tree-like Multiplier Gi-Yong Song, Jae-Jin Lee, Ho-Jun Lee, and Ho-Jeong Song, Chungbuk Nat'l Univ., ..."
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Univ.ofTokushima,Japan 3. Design and Implementation of the Tree-like Multiplier Gi-Yong Song, Jae-Jin Lee, Ho-Jun Lee, and Ho-Jeong Song, Chungbuk Nat'l Univ.,

Modeling Hierarchical Combinational Circuits

by Jerry R. Burch, David Dill, Elizabeth Wolf, Giovanni De Micheli - In Proc. Intl. Conf. on Computer-Aided Design , 1993
"... Hierarchical descriptions of combinational circuits often contain apparent loops [1, 3]. Since it may be difficult to distinguish apparent loops from actual loops, it is useful to construct models of combinational circuits that can handle cyclic dependencies. We show that Boolean relations are inade ..."
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Hierarchical descriptions of combinational circuits often contain apparent loops [1, 3]. Since it may be difficult to distinguish apparent loops from actual loops, it is useful to construct models of combinational circuits that can handle cyclic dependencies. We show that Boolean relations

The Synthesis of Cyclic Combinational Circuits

by Marc D. Riedel, Jehoshua Bruck - In Design Automation Conference (DAC , 2003
"... Digital circuits are called combinational if they are memoryless: they have outputs that depend only on the current values of the inputs. Combinational circuits are generally thought of as acyclic (i.e., feed-forward) structures. And yet, cyclic circuits can be combinational. Cycles sometimes occur ..."
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Digital circuits are called combinational if they are memoryless: they have outputs that depend only on the current values of the inputs. Combinational circuits are generally thought of as acyclic (i.e., feed-forward) structures. And yet, cyclic circuits can be combinational. Cycles sometimes occur

Determining Covers in Combinational Circuits

by Ljubomir Cvetković, Darko Dražić
"... In this paper we propose a procedure for determining 0 – or 1– cover of an arbitrary line in a combinational circuit. When determining a cover we do not need Boolean expression for the line; only the circuit structure is used. Within the proposed procedure we use the tools of the cube theory, in par ..."
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In this paper we propose a procedure for determining 0 – or 1– cover of an arbitrary line in a combinational circuit. When determining a cover we do not need Boolean expression for the line; only the circuit structure is used. Within the proposed procedure we use the tools of the cube theory

ATPG for Combinational Circuits on Configurable

by unknown authors
"... Hardware Abstract—In this paper, a new approach for generating test vectors that detects faults in combinational circuits is introduced. The approach is based on automatically designing a circuit which implements the-algorithm, an automatic test pattern generation (ATPG) algorithm, specialized for t ..."
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Hardware Abstract—In this paper, a new approach for generating test vectors that detects faults in combinational circuits is introduced. The approach is based on automatically designing a circuit which implements the-algorithm, an automatic test pattern generation (ATPG) algorithm, specialized

Formal Verification of Combinational Circuits

by Jawahar Jain, Amit Narayan, M. Fujita, A. Sangiovanni-vincentelli - In International Conference on VLSI Design , 1997
"... this paper we survey some state-of-the-art techniques used to perform automatic verification of combinational circuits. We classify the current approaches for combinational verification into two categories: functional and structural. The functional methods consist of representing a circuit as a cano ..."
Abstract - Cited by 9 (1 self) - Add to MetaCart
this paper we survey some state-of-the-art techniques used to perform automatic verification of combinational circuits. We classify the current approaches for combinational verification into two categories: functional and structural. The functional methods consist of representing a circuit as a

Test Set Compaction Algorithms for Combinational Circuits

by Ilker Hamzaoglu, Janak H. Patel , 2000
"... This paper presents a new algorithm, Essential Fault Reduction (EFR), for generating compact test sets for combinational circuits under the single stuck-at fault model, and a new heuristic for estimating the minimum single stuck-at fault test set size. These algorithms together with the dynamic co ..."
Abstract - Cited by 156 (5 self) - Add to MetaCart
This paper presents a new algorithm, Essential Fault Reduction (EFR), for generating compact test sets for combinational circuits under the single stuck-at fault model, and a new heuristic for estimating the minimum single stuck-at fault test set size. These algorithms together with the dynamic

On Timing Analysis of Combinational Circuits

by Ramzi Ben Salah, Marius Bozga, Oded Maler - In FORMATS’03, LNCS 2791 , 2003
"... Abstract. In this paper we report some progress in applying timed automata technology to large-scale problems. We focus on the problem of finding maximal stabilization time for combinational circuits whose inputs change only once and hence they can be modeled using acyclic timed automata. We develop ..."
Abstract - Cited by 9 (1 self) - Add to MetaCart
Abstract. In this paper we report some progress in applying timed automata technology to large-scale problems. We focus on the problem of finding maximal stabilization time for combinational circuits whose inputs change only once and hence they can be modeled using acyclic timed automata. We

Reliability Study of Combinational Circuits

by Edgar Holmann, G. Leonard Tyler, G. Leonard, Tyler Ivan, Ivan R. Linscott - In EURO--DAC , 1994
"... An exact, practical implementation of reliability calculation for combinational circuits can be based on a hierarchical decomposition of the circuit into manageable sub--units, and construction of exact summary tables for each sub--unit. For a simple example of voting logic, this exact reliability a ..."
Abstract - Cited by 1 (1 self) - Add to MetaCart
An exact, practical implementation of reliability calculation for combinational circuits can be based on a hierarchical decomposition of the circuit into manageable sub--units, and construction of exact summary tables for each sub--unit. For a simple example of voting logic, this exact reliability
Results 1 - 10 of 6,474