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The Boyer-Moore Theorem Prover and Its Interactive Enhancement
, 1995
"... . The so-called "Boyer-Moore Theorem Prover" (otherwise known as "Nqthm") has been used to perform a variety of verification tasks for two decades. We give an overview of both this system and an interactive enhancement of it, "Pc-Nqthm," from a number of perspectives. F ..."
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Cited by 34 (0 self)
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. The so-called "Boyer-Moore Theorem Prover" (otherwise known as "Nqthm") has been used to perform a variety of verification tasks for two decades. We give an overview of both this system and an interactive enhancement of it, "Pc-Nqthm," from a number of perspectives
Interaction with the Boyer-Moore Theorem Prover: A Tutorial Study Using the Arithmetic-Geometric Mean Theorem
, 1994
"... ..."
DEFN-SK: An extension of the Boyer-Moore theorem prover to handle first-order quantifiers
- Tech. Rept. 43, Computational Logic, Inc
, 1989
"... interpreted as representing the official policies, either expressed ..."
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Cited by 10 (2 self)
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interpreted as representing the official policies, either expressed
Addition of Free Variables to the PC-NQTHM Interactive Enhancement of the Boyer-Moore Theorem Prover
, 1990
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The Boyer-Moore Prover and Nuprl: An Experimental Comparison
- LOGICAL FRAMEWORKS
, 1991
"... We use an example to compare the Boyer-Moore Theorem Prover and the Nuprl Proof Development System. The respective machine verifications of a version of Ramsey's theorem illustrate similarities and differences between the two systems. The proofs are compared using both quantitative and non-quan ..."
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Cited by 28 (8 self)
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We use an example to compare the Boyer-Moore Theorem Prover and the Nuprl Proof Development System. The respective machine verifications of a version of Ramsey's theorem illustrate similarities and differences between the two systems. The proofs are compared using both quantitative and non
Microprocessor Design Verification
- Journal of Automated Reasoning
, 1989
"... The verification of a microprocessor design has been accomplished using a mechanical theorem prover. This microprocessor, the FM8502, is a 32-bit general purpose, von Neumann processor whose design-level (gate-level) specification has been verified with respect to its instruction-level specification ..."
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Cited by 60 (3 self)
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-level specification. Both specifications were written in the Boyer-Moore logic, and the proof of correctness was carried out with the Boyer-Moore theorem prover.
The Use of Explicit Plans to Guide Inductive Proofs
- 9TH CONFERENCE ON AUTOMATED DEDUCTION
, 1988
"... We propose the use of explicit proof plans to guide the search for a proof in automatic theorem proving. By representing proof plans as the specifications of LCF-like tactics, [Gordon et al 79], and by recording these specifications in a sorted meta-logic, we are able to reason about the conjectures ..."
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Cited by 295 (40 self)
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by building a proof plan based on a simple subset of the implicit proof plan embedded in the Boyer-Moore theorem prover, [Boyer & Moore 79].
A Verified Operating System Kernel
- UNIVERSITY OF TEXAS AT AUSTIN
, 1987
"... We present a multitasking operating system kernel, called KIT, written in the machine language of a uni-processor von Neumann computer. The kernel is proved to implement, on this shared computer, a fixed number of conceptually distributed communicating processes. In addition to implementing process ..."
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Cited by 30 (1 self)
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processes, the kernel provides the following verified services: process scheduling, error handling, message passing, and an interface to asynchronous devices. The problem is stated in the Boyer-Moore logic, and the proof is mechanically checked with the Boyer-Moore theorem prover.
The Verification of a Bit-Slice ALU
- Workshop on Hardware Speci Veri and Synthesis: Mathematical Aspects, Springer LNCS 408
, 1989
"... Government. The verification of a bit-slice ALU has been accomplished using a mechanical theorem prover. This ALU has an n-bit design specification, which has been verified to implement its top-level specification. The ALU and top-level specifications were written in the Boyer-Moore logic. The verif ..."
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Cited by 9 (2 self)
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Government. The verification of a bit-slice ALU has been accomplished using a mechanical theorem prover. This ALU has an n-bit design specification, which has been verified to implement its top-level specification. The ALU and top-level specifications were written in the Boyer-Moore logic
Results 1 - 10
of
3,540