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On the Use of Automatic Speaker Verification Systems in Forensic Casework
- In Audio- and Video-based Biometric Person Authentication
, 1999
"... In forensic applications of speaker recognition it is necessary to be able to specify a confidence level for a decision that two sets of recordings have been produced by the same speaker (or by different speakers). Forensic phoneticians are sometimes incriminated because they find it impossible to p ..."
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Cited by 1 (0 self)
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to provide 'hard' estimates of the confidence level of an expert opinion. In this paper it is investigated to what extent the problem can be solved by deploying automatic speaker verification algorithms, to work alone or to support the work of forensic phoneticians. It is shown that for several
©ARC Page 26 Automatic Speaker Verification System
"... Abstract: Automatic Speaker Verification (ASV) systems are being used for biometric authentication even if their vulnerability to spoofing is widely acknowledged. Recent work has proposed different spoofing approaches which can be used to test vulnerabilities. A tutorial of the design and developmen ..."
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Abstract: Automatic Speaker Verification (ASV) systems are being used for biometric authentication even if their vulnerability to spoofing is widely acknowledged. Recent work has proposed different spoofing approaches which can be used to test vulnerabilities. A tutorial of the design
Speaker verification using Adapted Gaussian mixture models
- Digital Signal Processing
, 2000
"... In this paper we describe the major elements of MIT Lincoln Laboratory’s Gaussian mixture model (GMM)-based speaker verification system used successfully in several NIST Speaker Recognition Evaluations (SREs). The system is built around the likelihood ratio test for verification, using simple but ef ..."
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Cited by 1010 (42 self)
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In this paper we describe the major elements of MIT Lincoln Laboratory’s Gaussian mixture model (GMM)-based speaker verification system used successfully in several NIST Speaker Recognition Evaluations (SREs). The system is built around the likelihood ratio test for verification, using simple
Automatic verification of finite-state concurrent systems using temporal logic specifications
- ACM Transactions on Programming Languages and Systems
, 1986
"... We give an efficient procedure for verifying that a finite-state concurrent system meets a specification expressed in a (propositional, branching-time) temporal logic. Our algorithm has complexity linear in both the size of the specification and the size of the global state graph for the concurrent ..."
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Cited by 1388 (62 self)
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We give an efficient procedure for verifying that a finite-state concurrent system meets a specification expressed in a (propositional, branching-time) temporal logic. Our algorithm has complexity linear in both the size of the specification and the size of the global state graph for the concurrent
Hybrid Automata: An Algorithmic Approach to the Specification and Verification of Hybrid Systems
, 1992
"... We introduce the framework of hybrid automata as a model and specification language for hybrid systems. Hybrid automata can be viewed as a generalization of timed automata, in which the behavior of variables is governed in each state by a set of differential equations. We show that many of the examp ..."
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Cited by 460 (20 self)
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We introduce the framework of hybrid automata as a model and specification language for hybrid systems. Hybrid automata can be viewed as a generalization of timed automata, in which the behavior of variables is governed in each state by a set of differential equations. We show that many
SIS: A System for Sequential Circuit Synthesis
, 1992
"... SIS is an interactive tool for synthesis and optimization of sequential circuits. Given a state transition table, a signal transition graph, or a logic-level description of a sequential circuit, it produces an optimized net-list in the target technology while preserving the sequential input-output b ..."
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Cited by 527 (44 self)
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as both a framework within which various algorithms can be tested and compared, and as a tool for automatic synthesis and optimization of sequential circuits. This paper provides an overview of SIS. The first part contains descriptions of the input specification, STG (state transition graph) manipulation
Bandera: Extracting Finite-state Models from Java Source Code
- IN PROCEEDINGS OF THE 22ND INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING
, 2000
"... Finite-state verification techniques, such as model checking, have shown promise as a cost-effective means for finding defects in hardware designs. To date, the application of these techniques to software has been hindered by several obstacles. Chief among these is the problem of constructing a fini ..."
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Cited by 654 (33 self)
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finite-state model that approximates the executable behavior of the software system of interest. Current best-practice involves handconstruction of models which is expensive (prohibitive for all but the smallest systems), prone to errors (which can result in misleading verification results
The synchronous dataflow programming language LUSTRE
- Proceedings of the IEEE
, 1991
"... This paper describes the language Lustre, which is a dataflow synchronous language, designed for programming reactive systems --- such as automatic control and monitoring systems --- as well as for describing hardware. The dataflow aspect of Lustre makes it very close to usual description tools in t ..."
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Cited by 646 (50 self)
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This paper describes the language Lustre, which is a dataflow synchronous language, designed for programming reactive systems --- such as automatic control and monitoring systems --- as well as for describing hardware. The dataflow aspect of Lustre makes it very close to usual description tools
Automatic Symbolic Verification of Embedded Systems
, 1996
"... We present a model-checking procedure and its implementation for the automatic verification of embedded systems. The system components are described as Hybrid Automata -- communicating machines with finite control and real-valued variables that represent continuous environment parameters such as tim ..."
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Cited by 330 (24 self)
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We present a model-checking procedure and its implementation for the automatic verification of embedded systems. The system components are described as Hybrid Automata -- communicating machines with finite control and real-valued variables that represent continuous environment parameters
Front End Factor Analysis for Speaker Verification
- IEEE Transactions on Audio, Speech and Language Processing
, 2010
"... Abstract—This paper presents an extension of our previous work which proposes a new speaker representation for speaker verification. In this modeling, a new low-dimensional speaker- and channel-dependent space is defined using a simple factor analysis. This space is named the total variability space ..."
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Cited by 315 (22 self)
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space because it models both speaker and channel variabilities. Two speaker verification systems are proposed which use this new representation. The first system is a support vector machine-based system that uses the cosine kernel to estimate the similarity between the input data. The second system
Results 1 - 10
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4,837