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Arithmetic Circuits
, 2004
"... I hereby declare that I am the sole author of this thesis. I authorize the University of Waterloo to lend this thesis to other institutions or individuals for the purpose of scholarly research. ..."
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Cited by 7 (0 self)
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I hereby declare that I am the sole author of this thesis. I authorize the University of Waterloo to lend this thesis to other institutions or individuals for the purpose of scholarly research.
Functions Definable by Arithmetic Circuits
"... Abstract. An arithmetic circuit (McKenzie and Wagner [6]) is a labelled, directed graph specifying a cascade of arithmetic and logical operations to be performed on sets of nonnegative integers. In this paper, we consider the definability of functions by means of arithmetic circuits. We prove two n ..."
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Cited by 1 (1 self)
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Abstract. An arithmetic circuit (McKenzie and Wagner [6]) is a labelled, directed graph specifying a cascade of arithmetic and logical operations to be performed on sets of nonnegative integers. In this paper, we consider the definability of functions by means of arithmetic circuits. We prove two
Learning Arithmetic Circuits
"... Graphical models are usually learned without regard to the cost of doing inference with them. As a result, even if a good model is learned, it may perform poorly at prediction, because it requires approximate inference. We propose an alternative: learning models with a score function that directly p ..."
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Cited by 23 (9 self)
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penalizes the cost of inference. Specifically, we learn arithmetic circuits with a penalty on the number of edges in the circuit (in which the cost of inference is linear). Our algorithm is equivalent to learning a Bayesian network with contextspecific independence by greedily splitting conditional
ACV: An Arithmetic Circuit Verifier
 In Int'l Conf. on CAD
, 1996
"... Based on a hierarchical verification methodology, we present an arithmetic circuit verifier ACV, in which circuits expressed in a hardware description language, also called ACV, are symbolically verified using Binary Decision Diagrams for Boolean functions and multiplicative Binary Moment Diagrams ( ..."
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Cited by 25 (5 self)
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Based on a hierarchical verification methodology, we present an arithmetic circuit verifier ACV, in which circuits expressed in a hardware description language, also called ACV, are symbolically verified using Binary Decision Diagrams for Boolean functions and multiplicative Binary Moment Diagrams
How to garble arithmetic circuits
 In Symposium on Foundations of Computer Science (FOCS ’11
, 2011
"... Yao’s garbled circuit construction transforms a boolean circuit C: {0, 1} n → {0, 1} m into a “garbled circuit ” Ĉ along with n pairs of kbit keys, one for each input bit, such that Ĉ together with the n keys corresponding to an input x reveal C(x) and no additional information about x. The garbled ..."
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Cited by 10 (3 self)
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. The garbled circuit construction is a central tool for constantround secure computation and has several other applications. Motivated by these applications, we suggest an efficient arithmetic variant of Yao’s original construction. Our construction transforms an arithmetic circuit C: Zn → Zm over integers
Parallel Evaluation of Arithmetic Circuits
 Theoretical Computer Science
, 1996
"... this paper, a generic algorithm designed for the parallel evaluation of arithmetic circuits is given. This algorithm can be used in the domain of VLSI design, in order to get tight upper bounds on the computing time of a circuit. It can also be used in automatic parallelization of numerical programs ..."
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Cited by 2 (0 self)
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this paper, a generic algorithm designed for the parallel evaluation of arithmetic circuits is given. This algorithm can be used in the domain of VLSI design, in order to get tight upper bounds on the computing time of a circuit. It can also be used in automatic parallelization of numerical
Arithmetic circuits and counting complexity classes
 In Complexity of Computations and Proofs,J.Krajíček, Ed. Quaderni di Matematica
"... Arithmetic circuits are the focus of renewed attention in the complexity theory community. It is easy to list a few of the reasons for the increased interest: • Innovative work by Kabanets and Impagliazzo [KI03] shows that, in ..."
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Cited by 27 (5 self)
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Arithmetic circuits are the focus of renewed attention in the complexity theory community. It is easy to list a few of the reasons for the increased interest: • Innovative work by Kabanets and Impagliazzo [KI03] shows that, in
Balancing Syntactically Multilinear Arithmetic Circuits
, 2007
"... In their seminal paper, Valiant, Skyum, Berkowitz and Rackoff proved that arithmetic circuits can be balanced [VSBR]. That is, [VSBR] showed that for every arithmetic circuit Φ of size s and degree r, there exists an arithmetic circuit Ψ of size poly(r, s) and depth O(log(r) log(s)) computing the sa ..."
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Cited by 11 (4 self)
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In their seminal paper, Valiant, Skyum, Berkowitz and Rackoff proved that arithmetic circuits can be balanced [VSBR]. That is, [VSBR] showed that for every arithmetic circuit Φ of size s and degree r, there exists an arithmetic circuit Ψ of size poly(r, s) and depth O(log(r) log(s)) computing
Learning restricted models of arithmetic circuits
 Theory of computing
"... Abstract: We present a polynomial time algorithm for learning a large class of algebraic models of computation. We show that any arithmetic circuit whose partial derivatives induce a lowdimensional vector space is exactly learnable from membership and equivalence queries. As a consequence, we obtai ..."
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Cited by 10 (3 self)
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Abstract: We present a polynomial time algorithm for learning a large class of algebraic models of computation. We show that any arithmetic circuit whose partial derivatives induce a lowdimensional vector space is exactly learnable from membership and equivalence queries. As a consequence, we
AttributeBased Encryption for Arithmetic Circuits
"... We present an Attribute Based Encryption system where access policies are expressed as polynomial size arithmetic circuits. We prove security against arbitrary collusions of users based on the learning with errors problem on integer lattices. The system has two additional useful properties: first, i ..."
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Cited by 3 (1 self)
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We present an Attribute Based Encryption system where access policies are expressed as polynomial size arithmetic circuits. We prove security against arbitrary collusions of users based on the learning with errors problem on integer lattices. The system has two additional useful properties: first
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